Intel · Filed Dec 22, 2025 · Published Jul 9, 2026 · verified — real USPTO data

Intel Patents a Ray-Tracing Method That Learns From Past Hit Results

Every time a ray of light misses something in a 3D scene, that's wasted work. Intel's new patent describes a processor that keeps score on past hits and uses that history to check the most likely spots first.

Intel Patent: Faster Ray Tracing via Hit-Driven Traversal Order — figure from US 2026/0195963 A1
Figure from the official USPTO publication.
Publication number US 2026/0195963 A1
Applicant Intel Corporation
Filing date Dec 22, 2025
Publication date Jul 9, 2026
Inventors Pawel Majewski, John Hartman Feit, Radoslaw Drabinski, Sven Woop, Mika Henrik Tuomi
CPC classification 345/426
Grant likelihood Medium
Examiner CENTRAL, DOCKET (Art Unit OPAP)
Status Docketed New Case - Ready for Examination (Jan 21, 2026)
Document 18 claims

How Intel's ray tracer gets faster by remembering past hits

Imagine a librarian who, every time someone asks for a book, makes a note of which shelves were actually useful. Over time, the librarian starts checking those shelves first instead of wandering the whole library. Intel's new patent applies the same idea to ray tracing, the rendering technique behind realistic lighting in modern games and films.

In ray tracing, your GPU fires millions of virtual light rays into a 3D scene and checks whether each one hits an object. The scene is organized like a nested set of boxes (called a tree), and the processor has to decide which branch of that tree to search first. Normally it just guesses. Intel's approach has the processor remember which branches led to real hits in the past and prioritize those branches on future rays.

The result is fewer wasted checks and, in theory, faster frame rendering. It's a bit like predictive text for 3D graphics: the system gets better the longer it runs.

How hit-trail counters reorder the BVH traversal path

Ray tracing works by testing millions of rays against a Bounding Volume Hierarchy (BVH), a tree-shaped data structure that carves a 3D scene into progressively smaller boxes. The processor walks down the tree, testing each branch to see if a ray intersects any geometry inside. Choosing the wrong branch first wastes time.

Intel's patent adds a feedback loop. Each time a ray actually hits a surface (a "successful intersection"), the processor records a trail tracing the path back up the tree from that surface all the way to the root. Every node along that trail gets its visit counter incremented.

When the processor later reaches any node in the tree and has to pick which child branch to explore first, it consults those counters. The child branch that has historically led to more real hits gets searched first. In practice this means:

  • Popular geometry (floors, walls, common objects) gets prioritized automatically
  • Rarely-hit branches get deferred, saving cycles
  • The ordering adapts as the scene changes over time

The counters are stored per-node in the BVH and updated incrementally, so there's no expensive re-sorting of the entire tree. The traversal order is determined on the fly at each node based on locally available counter data.

What this means for real-time graphics and game performance

Ray tracing is one of the most computationally expensive things a modern GPU does, and a big chunk of that cost comes from traversing the BVH. Any improvement to traversal efficiency translates directly into higher frame rates or better image quality at the same power budget. For gamers, that means more realistic lighting without as steep a performance penalty. For data centers rendering film-quality visuals, it means faster turnaround on frames.

Intel is also pushing its Arc GPU line into the discrete graphics market, where Nvidia and AMD have years of ray-tracing hardware experience. A traversal optimization baked into the processor itself, rather than relying purely on software heuristics, could give Intel's hardware a differentiated angle in a space where every percentage point of performance matters to buyers.

Editorial take

This is a genuinely interesting low-level optimization: instead of using static or geometry-based heuristics to order BVH traversal, Intel is proposing the hardware learn from actual runtime behavior. It's the kind of architectural detail that rarely makes headlines but can meaningfully move the needle on GPU benchmarks. Whether it survives the patent-to-silicon journey intact is another question, but the idea is sound.

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Source. Full patent text and figures from the official USPTO publication PDF.

Editorial commentary on a publicly published patent application. Not legal advice.