AMD · Filed Dec 29, 2025 · Published Aug 6, 2026 · verified — real USPTO data

AMD Patents a Two-Step Data Conversion That Keeps AI Calculations More Precise

Every time an AI chip converts a number from one format to another, tiny rounding errors can sneak in and compound. AMD's new patent describes a two-step conversion process designed to guarantee only one rounding error ever occurs, no matter how many format changes a value goes through.

AMD Patent: Converting Number Formats in AI Chips — figure from US 2026/0230089 A1
Figure from the official USPTO publication.
See all 4 drawings from this filing ↓
Publication number US 2026/0230089 A1
Applicant ADVANCED MICRO DEVICES, INC.
Filing date Dec 29, 2025
Publication date Aug 6, 2026
Inventors Eric Mark Schwarz, Stuart David Simpson Biles, Michael Estlick
CPC classification 708/200
Grant likelihood Medium
Examiner CENTRAL, DOCKET (Art Unit OPAP)
Status Docketed New Case - Ready for Examination (Feb 20, 2026)
Parent application Claims priority from a provisional application 63751985 (filed 2025-01-31)
Document 20 claims

What AMD's number-format trick does for AI accuracy

Imagine you're converting a measurement from inches to centimeters and then rounding to the nearest millimeter. If you round at the wrong step, your final number ends up slightly off, and in a long chain of calculations, those small errors stack up. AI chips deal with this constantly because they shuffle numbers between different formats to balance speed and precision.

AMD's patent describes a smarter conversion path that routes numbers through a carefully chosen middle format before landing in the final one. The key rule: the chip only rounds once, at a controlled point in the process. That single rounding guarantee keeps errors from multiplying across operations.

This matters most for tensor operations, the core math behind AI models. Cleaner number handling at this level can mean more accurate model outputs without needing more memory or slower, higher-precision formats across the board.

How the intermediate format limits conversion errors

The patent describes a system where an accelerator unit (AMD's term for a dedicated AI or compute chip) needs to convert a numerical value from one data format to another. Different formats trade off between range (how big a number can be) and precision (how many decimal places it can hold).

Instead of converting directly and rounding once at the end, or rounding multiple times during an ad-hoc conversion, the system uses a two-instruction approach:

  • A first instruction converts the value into a controlled intermediate data format, chosen specifically to avoid precision loss at that stage.
  • The value is then rounded according to a defined intermediate rounding mode (a rule for how to handle fractions, like always rounding toward zero).
  • A second instruction converts from the intermediate format to the final target format, applying a final modified rounding mode.

The claim's core guarantee is that the entire two-step journey introduces only a single rounding error, equivalent to what a perfect direct conversion would produce. The converted value is then ready for tensor operations, the matrix and vector math that powers neural networks.

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What this means for AI chip precision

AI accelerators like AMD's Instinct GPU line constantly juggle multiple numerical formats. Formats like FP8, FP16, BF16, and FP32 each have different precision characteristics, and models often mix them to save memory or speed up computation. Every format conversion is a potential source of small errors, and at scale those errors can degrade model quality in ways that are hard to trace back to the source.

A hardware-enforced single-rounding guarantee gives chip designers and AI framework developers a predictable, reliable conversion primitive. You get model outputs that behave consistently, without needing to pad everything with extra precision as a safety buffer. That could translate to more efficient use of chip memory and throughput in production AI workloads.

Editorial take

This is infrastructure-level chip math, not a headline feature, but it's exactly the kind of low-level correctness guarantee that separates reliable AI hardware from chips that produce subtly wrong answers under mixed-precision workloads. AMD is clearly shoring up the numerical foundations of its AI accelerator stack, and that's a sensible engineering priority as precision requirements for large model inference get stricter.

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The drawings

4 drawing sheets from US 2026/0230089 A1 · click any drawing to enlarge

Patent filing page

Source. Full patent text and figures from the official USPTO publication PDF.

Editorial commentary on a publicly published patent application. Not legal advice.