Qualcomm Patents a Chip That Stores Data and Calculates It Simultaneously
Qualcomm is filing patents on memory that doesn't just store data but can crunch numbers on its own, potentially cutting one of the biggest bottlenecks in modern chip design.
What Qualcomm's compute-in-cache idea actually does
Imagine every time you needed a calculator, you had to walk to a different room, grab it, walk back, do your math, then walk to a third room to store the result. That's roughly how most chips work today: data sits in memory, the processor fetches it, does the math, and sends results back. All that back-and-forth takes time and burns power.
Qualcomm's patent describes a cache memory (a fast-access storage layer inside a chip) that has its own small math units built right into it. Instead of shipping data out to a processor every time a calculation is needed, the cache can handle certain operations locally.
This approach is sometimes called near-memory computing, and it's a real focus for chip designers trying to make AI workloads faster and more efficient. Moving less data around means less energy spent and, in theory, faster results for tasks like running AI models on your phone.
How arithmetic units sit inside each cache bank
The patent describes what Qualcomm calls a polymorphic system level cache, meaning a cache that can switch roles, acting as ordinary fast storage sometimes and as a compute unit other times.
The hardware is organized into banks, each of which is an independent slice of cache memory. At least one bank in this design contains three key components:
- A data array: the actual memory cells that hold data
- A local register: a tiny, very fast holding area that can stage data for immediate use (think of it as a scratchpad next to the work surface)
- An arithmetic logic unit (ALU) array: a cluster of small math circuits capable of doing addition, multiplication, comparisons, and similar operations directly on the data in the bank
A cache controller sits above all the banks and coordinates which ones are doing storage work versus compute work at any given moment. That's the "polymorphic" part: the same physical hardware can be repurposed on the fly.
The design targets vector processing, meaning operations that apply the same math to many data points simultaneously, exactly the kind of work AI inference and signal processing demand.
What this means for AI chips and mobile processors
For Qualcomm, which sells chips for phones, PCs, and automotive platforms, the pressure to run AI models efficiently on-device is intense. One of the core problems is memory bandwidth: AI workloads move enormous amounts of data between storage and compute units, and that data movement often costs more energy than the math itself. Putting arithmetic units inside the cache directly attacks that problem.
If this architecture makes it into a shipping Snapdragon chip, you could see tangible effects: longer battery life during AI tasks, or the ability to run larger AI models locally without offloading to the cloud. It's infrastructure-level work, but the kind that shapes what your next phone or laptop can actually do.
This is a legitimate engineering bet on near-memory computing, an approach the chip industry has been circling for years but hasn't widely shipped in consumer silicon. Qualcomm building it into a cache controller rather than a separate accelerator block is a concrete architectural choice worth tracking. It's not flashy IP, but if it ships in a Snapdragon, the efficiency gains for on-device AI could be real.
The drawings
10 drawing sheets from US 2026/0219882 A1 · click any drawing to enlarge
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