Samsung Patents a Shared Memory Mirror System for Multi-Chip Packages

By Patentlyze Team · Updated Jun 5, 2026

When you stack multiple identical chips on a single substrate, keeping them all working from the same playbook is surprisingly hard. Samsung's new patent tackles that coordination problem with a clever shared-memory mirror system.

What Samsung's mirrored chip memory actually does

Imagine you're running a restaurant with several identical kitchens. Each kitchen needs its own storage for its own orders, but they all need access to the same master recipe book. If one kitchen has a slightly different recipe book, dishes come out inconsistent. That's essentially the coordination headache that arises when you put multiple identical chips on a single package.

Samsung's patent describes a system where each chip gets its own dedicated slice of memory for its own work, but there's also a shared private memory region that all chips can read from. The clever part: that shared region is automatically mirrored — copied — into each chip's own memory space, so every chip always has a local, up-to-date copy without having to constantly reach across to a central location.

The result is that a group of identical chips on the same interposer can coordinate their internal operations efficiently, each working from a consistent local copy of shared data rather than fighting over a single shared resource.

How the private memory region gets mirrored across chips

The patent describes a multi-chip semiconductor device built on an interposer (a thin silicon or organic layer that physically and electrically connects multiple chips in a single package). The chips involved are homogeneous — meaning they're all the same type and design, like replicated processor or memory dies.

Each chip manages a memory map — essentially an address book that tells the chip where different types of data live in the overall memory space. That map is divided into two kinds of regions:

• System memory regions: private slices allocated exclusively to each individual chip for its own workloads.
• Private memory region: a shared logical space that all chips can access, used for internal coordination data that every chip needs.

The key mechanism is mirroring: the contents of the shared private memory region are automatically copied into a designated mirror region within each chip's own system memory. So rather than all chips contending for a single shared resource — which creates latency and bottlenecks — each chip reads from its own local mirror copy. Updates to the private region propagate out to all the mirrors, keeping every chip in sync.

This design is particularly relevant for chiplet-based architectures, where a single package combines multiple replicated dies to scale up compute or memory capacity.

What this means for high-density chip packaging

As the semiconductor industry pushes further into chiplet packaging — where a single device is built from multiple identical or heterogeneous dies on an interposer — managing shared state between those dies becomes a real engineering challenge. Naively sharing memory across chips introduces latency and contention. Samsung's mirroring approach lets each chip work locally while still staying coordinated, which is a practical win for performance and design simplicity.

This is most relevant to Samsung's high-bandwidth memory (HBM) and advanced packaging roadmap, areas where the company is directly competing with SK Hynix and Micron. A more elegant shared-memory coordination scheme could reduce the overhead needed to keep multi-die stacks operating as a coherent unit — though whether this specific approach ships in a real product is an open question.

Editorial commentary on a publicly published patent application. Not legal advice.