Sony Patents a Power-Terminal Layout That Keeps Stacked Image Sensors From Degrading
Sony has filed a patent for a way to arrange the power connections inside a stacked image sensor so that the chip's picture quality doesn't suffer as the design gets thinner and more complex.
What Sony's stacked sensor power design actually does
Every time your phone camera fires the shutter, a tiny chip converts light into data in a fraction of a second. That chip has two main layers: one that catches light, and one that processes the data. Connecting them cleanly, and supplying power to the right places, turns out to be one of the harder engineering puzzles in modern camera hardware.
Sony's patent tackles a specific wrinkle in that puzzle. When engineers stack a processing board beneath a light-catching sensor board, they need to bring power in from the outside. The usual approach puts those power connection points around the edges. Sony's filing instead places at least some of those power terminals directly beneath the pixel area itself, running power straight up through the chip stack rather than routing it in from the sides.
The stated goal is to stop "deterioration of device characteristics", meaning the chip should stay accurate and stable rather than developing voltage drop or signal noise that erodes image quality over time.
… a voltage supply terminal that is provided on an opposite side of a surface of the circuit board facing the sensor board and that supplies a power supply voltage or a reference voltage to the circuits …
Translation: The power connector sits on the back face of the circuit board to feed electricity to the internal components.
How the terminal placement maps onto the pixel layer
The patent describes a multilayer imaging chip built from two bonded boards. The top board, called the sensor board, holds a grid of pixels that convert incoming light into electrical signals (a process called photoelectric conversion). The bottom board, called the circuit board, holds the logic that reads and processes those signals.
Power has to reach the circuit board from outside the chip. The connection points that carry that power are called voltage supply terminals. These terminals sit on the outer face of the circuit board, which is the face that points away from the sensor board above it.
The key claim is about where exactly those terminals sit:
- At least a portion of them must be positioned so that, if you looked straight down through the chip stack, they would overlap with the pixel region on the sensor board above.
- This means power is delivered more directly beneath the pixels rather than only at the chip's perimeter.
- The design supplies either a power supply voltage (the working voltage for active circuits) or a reference voltage (a stable baseline that other signals are measured against).
The patent frames this arrangement as a way to suppress degradation of the chip's electrical behavior, suggesting that routing power more centrally helps maintain uniform voltage across the processing circuits.
An imaging device and an electronic apparatus capable of suppressing deterioration of device characteristics are provided.
Translation: This invention prevents the camera chip's performance from degrading over time.
What this means for Sony's camera sensor business
Sony supplies image sensors to a huge share of the global smartphone market, so incremental improvements to how those sensors are built have a wide reach. As sensor stacks get thinner and pixel counts climb, keeping voltage stable across the whole chip becomes harder. A design that delivers power more directly under the pixel area could help Sony hold image quality steady as it pushes pixel density higher.
Sony Semiconductor's steady run of stacked-sensor filings signals that the company sees chip architecture, not just lens optics, as its main competitive edge. For you as a phone buyer, that translates into the long-term goal of cameras that stay accurate even as the underlying hardware keeps shrinking.
Sony's 34th chip filing we've tracked since May adds to a run that includes one on dual-range focus capture and one on distance-based scene focus in our chip patent coverage.
Putting power-delivery terminals directly beneath the pixel area locks those spots on the chip out of any other use. That's a real sacrifice in a sensor where every fraction of a millimeter of board space is contested.
The trade earns its keep only if the alternative, feeding power from the edges, would let voltage sag unevenly across a dense pixel grid and visibly degrade image quality. At high enough pixel counts, that sag becomes unavoidable, which makes the layout choice look more like a necessity than a preference.
What Sony has filed here is a structural arrangement, not a new material or process. It shapes how production chips get built rather than advancing any underlying science, and that's a useful thing to do, even if it rarely draws attention outside a manufacturing floor.
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The drawings
29 drawing sheets from US 2026/0261783 A1 · click any drawing to enlarge
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