Nvidia · Filed Jul 21, 2026 · Published Nov 12, 2026

Nvidia Files Patent for AI That Counts Phones Trying to Connect at Once

When two phones shout the same opening signal at a cell tower at the same instant, today's 5G process makes every one of them go through a slow sorting-out routine. Nvidia's filing has the tower count the shouters first, then hand each one its own timing instruction.

A cell tower uses artificial intelligence to estimate signal timing and coordinate wireless connections with mobile phones. Drawing from patent filing US 2026/0362505 A1.
A cell tower uses artificial intelligence to estimate signal timing and coordinate wireless connections with mobile phones.
See all 68 drawings from this filing ↓
Publication number US 2026/0362505 A1 US20260362505A1
Applicant NVIDIA Corporation
Filing date Jul 21, 2026
Publication date Nov 12, 2026
Inventors Xingqin Lin
US classification 370/329
Status when we published Waiting for an examiner (Aug 8, 2026)
Parent application is a Continuation of 18393486 (filed 2023-12-21)
Document 20 claims

What Nvidia's phone-counting 5G tower does

Ever stood in a packed stadium with full bars while your phone just spins? One reason can be a traffic jam at the very first step: getting connected to the cell tower.

To join, your phone sends a short opening signal. Sometimes two or more phones send the exact same one at the exact same moment, and the tower can't tell them apart. Today, all of those phones have to go through a multi-step sorting-out process, which the filing says adds delay, wastes radio capacity and uses more battery.

Nvidia's patent has the tower use a neural network (a type of AI) to count how many phones just collided. The tower then sends back a separate timing adjustment for each one, so the phones are less likely to all get stuck in the slow routine together.

From the filing · CLAIM 1
calculate, using a neural network, a quantity indicating a number of wireless devices from which a base station received one or more wireless signals during the same time slot and the same frequency band …

Translation: The AI counts how many phones are trying to connect to a cell tower at the exact same time and on the same channel.

How the tower counts phones and assigns timing

When a phone first reaches for a 5G tower, it sends a short opening signal called a preamble on a shared channel (the physical random access channel, or PRACH). The claims cover the case where several phones use the same preamble in the same time slot and frequency band. The tower uses a neural network (a trained AI model) to estimate how many phones sent it.

First the tower cleans up the signal. It strips off the cyclic prefix (a padding section at the start), converts the signal from the time domain to the frequency domain (a different way of looking at the same wave), and compares it with a list of candidate preambles. The count can run from zero up to a set maximum. At zero, the next step is skipped. At one, a single timing value is needed. In between, a second network predicts that many timing values.

Each timing advance value tells a phone how to shift when it transmits. The tower's reply carries the list, and the filing describes several layouts:

  • One uplink grant (a slot to send in) and one temporary ID per timing value
  • One grant and one ID shared by all the values
  • Values split into groups, each group with its own grant and ID

Each phone compares the list with its own reference guess (its current timing, a distance-based estimate, or a random value) and picks the closest match. If nothing is close enough, it counts the reply as failed and tries again.

From the filing · THE ABSTRACT
… identify a number of wireless devices communicating with one or more base stations based, at least in part, on communication signals, data structures, or information received by one or more base stations …

Translation: The system figures out how many gadgets are talking to cell towers by analyzing the incoming signals and data.

What this means for your signal in a crowd

If this works as described, the payoff lands where lots of phones try to join the same tower at once: stadiums, rush-hour stations, festivals. The filing says today's process drags out the time it takes to get access, wastes radio capacity and uses more of your phone's battery. Giving each colliding phone its own timing value is meant to ease all three.

The work happens mostly on the tower's side, with matching rules on the phone, so any real change would likely need phones and networks to agree on the same setup. The filing lists GPUs among the chips that could run the AI, the processors Nvidia is best known for.

Nvidia's 639th filing in our Nvidia coverage since May adds to a body of work that includes face-reading game difficulty and robot hand training.

Editorial take

You will almost never notice this one, and that is the point. The failure it targets is the brief stall when your phone tries to join a tower at the same instant as other phones: a wait before data starts, plus a little battery spent on retries.

If it works, you would feel it in crowded places like stadiums, train stations and concerts. A page would start loading a beat sooner. That is a small gain per person, but it repeats on every connection attempt all day.

Nothing in the filing says how much faster it would be, so the size of the benefit is still a guess. It also needs phones and towers to follow the same rules, which keeps it a slow-burn idea for your next phone upgrade cycle.

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The drawings

68 drawing sheets from US 2026/0362505 A1 · click any drawing to enlarge

How a cell tower and phone coordinate connection timing, drawing sheet 1 from US 2026/0362505 A1
Sheet 1 How a cell tower and phone coordinate connection timing
An AI system that spots multiple phones connecting at once, drawing sheet 2 from US 2026/0362505 A1
Sheet 2 An AI system that spots multiple phones connecting at once
Pairing each timing command with its own network grant, drawing sheet 3 from US 2026/0362505 A1
Sheet 3 Pairing each timing command with its own network grant
Grouping timing commands together ahead of transmission grants, drawing sheet 4 from US 2026/0362505 A1
Sheet 4 Grouping timing commands together ahead of transmission grants
Sharing a single network grant across multiple timing commands, drawing sheet 5 from US 2026/0362505 A1
Sheet 5 Sharing a single network grant across multiple timing commands
Bundling timing values into groups with individual grants, drawing sheet 6 from US 2026/0362505 A1
Sheet 6 Bundling timing values into groups with individual grants
Dividing timing values into evenly sized batches, drawing sheet 7 from US 2026/0362505 A1
Sheet 7 Dividing timing values into evenly sized batches
How your phone picks the right timing signal to connect, drawing sheet 8 from US 2026/0362505 A1
Sheet 8 How your phone picks the right timing signal to connect
Show the other 52 sheets
How a phone picks the right broadcast timing signal, drawing sheet 9 from US 2026/0362505 A1
Sheet 9 How a phone picks the right broadcast timing signal
Steps for a phone to calculate its own transmission delay, drawing sheet 10 from US 2026/0362505 A1
Sheet 10 Steps for a phone to calculate its own transmission delay
An AI workflow that estimates how many phones are connecting, drawing sheet 11 from US 2026/0362505 A1
Sheet 11 An AI workflow that estimates how many phones are connecting
Matching cell tower broadcast signals against internal estimates, drawing sheet 12 from US 2026/0362505 A1
Sheet 12 Matching cell tower broadcast signals against internal estimates
Software layers that let apps run the neural network, drawing sheet 13 from US 2026/0362505 A1
Sheet 13 Software layers that let apps run the neural network
Server center layout managing the network computing tasks, drawing sheet 14 from US 2026/0362505 A1
Sheet 14 Server center layout managing the network computing tasks
External sensors and controls on a self-driving car, drawing sheet 15 from US 2026/0362505 A1
Sheet 15 External sensors and controls on a self-driving car
Camera viewing angles surrounding an autonomous vehicle, drawing sheet 16 from US 2026/0362505 A1
Sheet 16 Camera viewing angles surrounding an autonomous vehicle
Sensors, cameras, and onboard chips that guide a self-driving car, drawing sheet 17 from US 2026/0362505 A1
Sheet 17 Sensors, cameras, and onboard chips that guide a self-driving car
Cloud servers sending AI models and map updates to cars, drawing sheet 18 from US 2026/0362505 A1
Sheet 18 Cloud servers sending AI models and map updates to cars
Main circuit boards and chips that coordinate everyday computer tasks, drawing sheet 19 from US 2026/0362505 A1
Sheet 19 Main circuit boards and chips that coordinate everyday computer tasks
Inside parts connecting touchscreens, audio, and wireless radios, drawing sheet 20 from US 2026/0362505 A1
Sheet 20 Inside parts connecting touchscreens, audio, and wireless radios
Multiple parallel processors linked together for heavy computing tasks, drawing sheet 21 from US 2026/0362505 A1
Sheet 21 Multiple parallel processors linked together for heavy computing tasks
Removable USB stick with its own built-in processor, drawing sheet 22 from US 2026/0362505 A1
Sheet 22 Removable USB stick with its own built-in processor
Paired main processors sharing work across dedicated graphics chips, drawing sheet 23 from US 2026/0362505 A1
Sheet 23 Paired main processors sharing work across dedicated graphics chips
Direct connections between main processors and graphics chips, drawing sheet 24 from US 2026/0362505 A1
Sheet 24 Direct connections between main processors and graphics chips
Connecting multiple graphics engines directly to main computer memory, drawing sheet 25 from US 2026/0362505 A1
Sheet 25 Connecting multiple graphics engines directly to main computer memory
How apps hand off visual tasks straight to graphics chips, drawing sheet 26 from US 2026/0362505 A1
Sheet 26 How apps hand off visual tasks straight to graphics chips
Managing shared memory addresses across virtual systems and chips, drawing sheet 27 from US 2026/0362505 A1
Sheet 27 Managing shared memory addresses across virtual systems and chips
Pooling separate processor and graphics memories into one unified space, drawing sheet 28 from US 2026/0362505 A1
Sheet 28 Pooling separate processor and graphics memories into one unified space
An all-in-one chip that handles app logic, video, and security, drawing sheet 29 from US 2026/0362505 A1
Sheet 29 An all-in-one chip that handles app logic, video, and security
Internal layout of a graphics chip that splits rendering tasks, drawing sheet 30 from US 2026/0362505 A1
Sheet 30 Internal layout of a graphics chip that splits rendering tasks
A graphics chip design using shader cores and task managers, drawing sheet 31 from US 2026/0362505 A1
Sheet 31 A graphics chip design using shader cores and task managers
Inside the compute engines that process graphics instructions in parallel, drawing sheet 32 from US 2026/0362505 A1
Sheet 32 Inside the compute engines that process graphics instructions in parallel
Compute clusters arranged inside a graphics chip for network workloads, drawing sheet 33 from US 2026/0362505 A1
Sheet 33 Compute clusters arranged inside a graphics chip for network workloads
Hardware parts that link wireless network cards to graphics chips, drawing sheet 34 from US 2026/0362505 A1
Sheet 34 Hardware parts that link wireless network cards to graphics chips
How an AI chip moves data fast to think quickly, drawing sheet 35 from US 2026/0362505 A1
Sheet 35 How an AI chip moves data fast to think quickly
Internal memory units buffering data inside a parallel processor, drawing sheet 36 from US 2026/0362505 A1
Sheet 36 Internal memory units buffering data inside a parallel processor
Inside a processing cluster handling heavy telecommunications math, drawing sheet 37 from US 2026/0362505 A1
Sheet 37 Inside a processing cluster handling heavy telecommunications math
Execution cores inside a multiprocessor running simultaneous tasks, drawing sheet 38 from US 2026/0362505 A1
Sheet 38 Execution cores inside a multiprocessor running simultaneous tasks
Multiple graphics processors wired together to share cell data, drawing sheet 39 from US 2026/0362505 A1
Sheet 39 Multiple graphics processors wired together to share cell data
Modular graphics processing cores sharing hardware resources, drawing sheet 40 from US 2026/0362505 A1
Sheet 40 Modular graphics processing cores sharing hardware resources
How the main chip works on tasks out of order, drawing sheet 41 from US 2026/0362505 A1
Sheet 41 How the main chip works on tasks out of order
Connecting the main chip to memory, sensors, and wireless radios, drawing sheet 42 from US 2026/0362505 A1
Sheet 42 Connecting the main chip to memory, sensors, and wireless radios
Multiple processing cores sharing onboard memory along a high-speed ring, drawing sheet 43 from US 2026/0362505 A1
Sheet 43 Multiple processing cores sharing onboard memory along a high-speed ring
Inside the graphics chip that generates video and 3D scenes, drawing sheet 44 from US 2026/0362505 A1
Sheet 44 Inside the graphics chip that generates video and 3D scenes
Specialized math and memory parts running inside the graphics engine, drawing sheet 45 from US 2026/0362505 A1
Sheet 45 Specialized math and memory parts running inside the graphics engine
Graphics chip parts sharing memory to run faster, drawing sheet 46 from US 2026/0362505 A1
Sheet 46 Graphics chip parts sharing memory to run faster
Distributing work across rows of processing units inside each core, drawing sheet 47 from US 2026/0362505 A1
Sheet 47 Distributing work across rows of processing units inside each core
Calculation parts that crunch several numbers at once, drawing sheet 48 from US 2026/0362505 A1
Sheet 48 Calculation parts that crunch several numbers at once
Main layout of a graphics chip that speeds computing, drawing sheet 49 from US 2026/0362505 A1
Sheet 49 Main layout of a graphics chip that speeds computing
Inside the chip section handling graphics and data, drawing sheet 50 from US 2026/0362505 A1
Sheet 50 Inside the chip section handling graphics and data
Memory management section that organizes data for the graphics processor, drawing sheet 51 from US 2026/0362505 A1
Sheet 51 Memory management section that organizes data for the graphics processor
Core calculation engine that runs multiple instruction threads at once, drawing sheet 52 from US 2026/0362505 A1
Sheet 52 Core calculation engine that runs multiple instruction threads at once
Phones connecting to a cell tower and network, drawing sheet 53 from US 2026/0362505 A1
Sheet 53 Phones connecting to a cell tower and network
How mobile network traffic routes to cloud servers, drawing sheet 54 from US 2026/0362505 A1
Sheet 54 How mobile network traffic routes to cloud servers
Transmitters and receivers coordinating signals between phones and towers, drawing sheet 55 from US 2026/0362505 A1
Sheet 55 Transmitters and receivers coordinating signals between phones and towers
Varied connected gadgets including drones, cars, and phones sharing 5G, drawing sheet 56 from US 2026/0362505 A1
Sheet 56 Varied connected gadgets including drones, cars, and phones sharing 5G
Everyday gadgets sharing a single 5G wireless network, drawing sheet 57 from US 2026/0362505 A1
Sheet 57 Everyday gadgets sharing a single 5G wireless network
How data center chips manage mobile radio traffic, drawing sheet 58 from US 2026/0362505 A1
Sheet 58 How data center chips manage mobile radio traffic
Connecting laptops through cell towers back to web servers, drawing sheet 59 from US 2026/0362505 A1
Sheet 59 Connecting laptops through cell towers back to web servers
Radio chips inside a mobile device that process signals, drawing sheet 60 from US 2026/0362505 A1
Sheet 60 Radio chips inside a mobile device that process signals

Sheets 61 to 68 are in the full USPTO filing.

Browse all the drawings 68 drawing sheets
Patent filing page

Source. Full patent text and figures from the official USPTO publication PDF.
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