Intel · Filed Dec 30, 2025 · Published Jul 23, 2026

Intel Patents Hardware That Runs AI Calculations Using Less Memory and Power

Intel is patenting the internal plumbing of an AI processor that handles a compact number format called FP8, which lets chips do more math with less power. It's the kind of low-level design work that determines whether Intel's next AI accelerators can compete with Nvidia.

Intel Patent: 8-Bit Floating Point AI Chip Architecture — figure from US 2026/0211676 A1
Figure from the official USPTO publication.
See all 51 drawings from this filing ↓
Publication number US 2026/0211676 A1 US20260211676A1
Applicant Intel Corporation
Filing date Dec 30, 2025
Publication date Jul 23, 2026
Inventors Naveen Mellempudi, Subramaniam Maiyuran, Varghese George, Fangwen Fu, Shuai Mu, Supratim Pal, Wei Xiong
US classification 712/208
Status when we published Waiting for an examiner (Apr 16, 2026)
Parent application is a Continuation of 17212588 (filed 2021-03-25)
Document 19 claims

What Intel's 8-bit floating point chip design actually does

Imagine your phone's calculator doing the same math but with shorter, rougher numbers instead of precise ones. The answers aren't perfect, but they're close enough, and the calculation finishes in a fraction of the time. That's essentially the tradeoff behind a number format called FP8 (8-bit floating point), which AI researchers use to speed up the enormous math problems involved in training and running AI models.

Intel's patent describes a processor design that handles FP8 numbers natively, meaning the chip has dedicated hardware specifically built to work with this compact format. You don't have to convert numbers or approximate on the fly: the chip just knows how to do FP8 math directly.

The core operation being optimized is a dot product, which is essentially a structured chain of multiply-then-add steps. It's the single most repeated calculation in nearly every AI workload. Building hardware that does this faster and more efficiently with smaller numbers is one of the main ways chipmakers squeeze more AI performance out of the same amount of silicon.

How Intel's systolic dot product circuits crunch FP8 numbers

The patent describes a processor that can decode and execute a special matrix instruction designed for 8-bit floating point operands (the individual numbers being calculated). Three main components work together:

  • Decoder: Translates the incoming instruction into a form the chip can act on, identifying that this is an FP8 matrix operation rather than standard 32-bit or 16-bit math.
  • Controller: Schedules when the instruction runs and feeds the right data in the right format to the math hardware below it.
  • Systolic dot product circuitry: The actual computation engine. "Systolic" refers to a grid-like arrangement of math units (multipliers, shifters, and adders) where data flows rhythmically from one unit to the next, like a pulse. Each layer in this grid handles a piece of the dot product calculation, and the layers chain together to produce the final result.

The design explicitly supports multiple FP8 sub-formats (such as E4M3 and E5M2, which differ in how they split the 8 bits between range and precision), giving software flexibility to choose the format that best suits a given AI task.

This is purely a hardware-level description of how the chip's internal circuits are wired, not a software library or programming interface.

What this means for AI chip efficiency and Intel's roadmap

FP8 has become a standard precision level for AI inference and training acceleration. Nvidia's H100 and H200 chips already support it, and AMD has added FP8 support to its Instinct line. Intel filing a patent on its own FP8 processor architecture signals that the company is building this capability into future Gaudi or Falcon Shores-class AI accelerators rather than licensing or approximating around it.

For you as an end user, this kind of work is invisible, but it's what determines whether AI services run faster and cheaper. Chips that do FP8 math natively use less memory bandwidth and less power per calculation, which translates to lower costs for cloud AI providers and, in theory, faster responses in the AI tools you use every day.

Editorial take

This is a foundational infrastructure patent, not a flashy product announcement. The claims were all canceled in the published version, which limits its immediate legal weight, but the technical disclosure still reveals how Intel is thinking about FP8 hardware internally. Given that FP8 support is now table stakes for any competitive AI accelerator, this patent is worth tracking as a signal of Intel's chip architecture direction, even if it doesn't tell us anything about a specific shipping product.

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The drawings

51 drawing sheets from US 2026/0211676 A1 · click any drawing to enlarge

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Patent filing page

Source. Full patent text and figures from the official USPTO publication PDF.