Qualcomm Patent Targets Quieter IC Power Delivery Through RDL-Embedded Capacitors

By Patentlyze Team · Updated Jul 10, 2026

Every processor needs a steady supply of electricity, but the longer the wires carrying that power, the noisier and less stable it gets. Qualcomm's latest patent moves tiny power-smoothing components so close to the chip that the problem nearly disappears.

What Qualcomm's capacitor-in-package trick actually does

Imagine your phone's processor as a sprinter who needs water handed to them mid-race. If the water station is far away, there's a delay and a lot of spillage. Qualcomm's idea is to put that water station right next to the runner.

Inside a chip package, small components called capacitors act as local reservoirs of electrical charge. They absorb sudden spikes and fill in sudden drops in power, keeping the processor running smoothly. Normally these capacitors sit on the circuit board, a relatively long distance from the chip itself. This patent describes a way to embed them in a thin layer directly between the chip and the board beneath it.

The benefit is less electrical noise and more stable power delivery, which can mean better performance or lower energy waste. The layer also handles the job of routing signals between the chip's very fine connection points and the coarser wiring of the board below, acting as a translator between two different scales of circuitry.

How the RDL substrate sandwiches and connects everything

The patent describes an integrated circuit (IC) package that adds a special intermediate layer, called a redistribution layer (RDL) substrate, between an IC chip and the larger package substrate (the board-level carrier beneath it).

Buried inside that intermediate layer is one or more embedded capacitors connected to the chip's power distribution network (PDN). The PDN is the system of wires and components that delivers electricity to the processor. Capacitors placed on the PDN act as decoupling capacitors (local charge buffers that absorb electrical fluctuations before they reach the chip). The closer they sit to the chip, the less parasitic inductance (unwanted resistance to rapid changes in current, caused by wire length) degrades their effectiveness.

The RDL layer serves two roles at once:

• It provides fine-pitch interconnects on the side facing the chip, matching the chip's very densely packed contact points.
• It fans those connections out to the coarser wiring of the package substrate below, using vertical conducting columns called vias.

A key structural detail in the claim is a second via that runs alongside the capacitor but does not electrically connect the top and bottom of the stack. This geometry lets the capacitor sit in the same layer as the main signal-carrying vias without interfering with them, keeping the package thin and the layout clean.

What this means for Qualcomm's next-gen mobile chips

Power delivery is one of the harder engineering problems in modern chip design. As processors get faster, they demand current in shorter and sharper bursts. Any delay or noise in the power supply shows up as errors or throttling. Bringing capacitors physically closer to the die is a well-known fix, but doing it without adding size, cost, or routing complexity is the hard part. Qualcomm's approach packages the capacitor into an RDL layer that was already needed for signal routing, so it earns its place without adding a dedicated extra component.

For Qualcomm specifically, this matters because its Snapdragon chips power a huge share of high-end Android phones and are increasingly used in laptops. Tighter power delivery can translate into either higher peak performance or longer battery life, both of which are central to Qualcomm's competitive positioning against Apple's in-house silicon and MediaTek.

Editorial commentary on a publicly published patent application. Not legal advice.