AMD Patents a Chip That Ignores AI Model Zeros to Cut Memory Use

By Patentlyze Team · Updated Jul 10, 2026

A huge portion of the data inside a trained AI model is just zeros, and most chips process them anyway. Xilinx's new patent describes hardware that finds those zeros and skips them entirely.

How Xilinx's chip skips useless zeros in AI models

Imagine filling out a spreadsheet where half the cells are blank. A normal calculator would still go through every cell one by one. Xilinx's approach is like teaching the calculator to skip the blanks automatically, saving time and energy.

When an AI model is stored on a chip, its internal settings (called "weights") are usually compressed to save space. When the chip unpacks them, it finds that a lot of those values are zero. Zero times anything is still zero, so those calculations are wasted work. This patent describes logic built into the chip itself that spots where all the zeros are and removes the matching inputs before the math even starts.

The result is that the chip does less work per AI calculation, which means it can process more in the same amount of time or use less power doing the same job. That kind of efficiency matters a lot in chips designed to run AI models at scale.

How the engine prunes activations using zero-index maps

The patent covers an integrated circuit (a chip) built around what Xilinx calls a data processing engine. The engine has two key parts: a local memory that holds the AI model's activations (the input data flowing through the network) and compressed weights (the model's learned parameters, stored in a compact form to save space).

When the chip is ready to run a calculation, it first decompresses the weights back to their full form. At that point, it doesn't just start multiplying. Instead, it scans the unpacked weights to find the locations of zero values, recording their positions as an index.

Those zero-position indexes are then used to prune the activations: any input value that would be paired with a zero weight gets removed from the calculation queue. Since multiplying by zero always produces zero, those results would have contributed nothing anyway.

• Decompress stored weights into full form
• Scan the full weights and log every zero's position
• Strip out the matching activations using that position list
• Run the ML calculation on the slimmed-down data set

The whole process is handled in hardware logic on the chip, so no software overhead is needed to manage it.

What this means for running AI on dedicated hardware

AI models are often deliberately trained to produce sparse weight matrices (ones with lots of zeros) because it makes them smaller and faster in theory. The gap has always been whether the hardware can actually take advantage of that sparsity at runtime. Most general-purpose processors can't, so the zeros get processed anyway and the efficiency gains on paper never show up in practice.

This patent puts the sparsity-handling logic directly inside the processing engine, which means chips based on this design could run sparse AI models faster and with less memory bandwidth than standard designs. For data centers running inference workloads at high volume, or for edge devices where power is limited, that is a concrete engineering advantage rather than a theoretical one.

Editorial commentary on a publicly published patent application. Not legal advice.