IBM · Filed Feb 3, 2025 · Published Aug 6, 2026 · verified — real USPTO data

IBM Files Patent for AI Math Acceleration Through Analog Electrical Pulse Signals

Most AI chips do math the digital way, flipping billions of ones and zeroes millions of times per second. IBM's new patent describes a different approach: let electricity itself do the multiplication, inside a physical grid of resistors.

IBM Patent: Analog Matrix Multiplier for AI Chips — figure from US 2026/0229302 A1
Figure from the official USPTO publication.
See all 8 drawings from this filing ↓
Publication number US 2026/0229302 A1
Applicant INTERNATIONAL BUSINESS MACHINES CORPORATION
Filing date Feb 3, 2025
Publication date Aug 6, 2026
Inventors TAYFUN GOKMEN, Lior Horesh, Vasileios Kalantzis, Malte Johannes Rasch
CPC classification 365/46
Grant likelihood Medium
Examiner HUANG, MIN (Art Unit 2827)
Status Docketed New Case - Ready for Examination (Mar 20, 2025)
Document 20 claims

What IBM's analog pulse-based AI chip actually does

Imagine a city power grid where two signals traveling along different wires meet at an intersection. IBM's patent uses that same idea inside a chip. It sends electrical pulses along rows and columns of a grid, and when two pulses happen to arrive at the same intersection at the same time, the chip reads the electrical result of that collision as a calculation. No traditional math circuits required.

The grid is made of resistive devices (tiny components that control how much electricity flows) and capacitors (components that store a small charge). Those capacitors hold the running tally of calculations in progress, which means the chip can keep accumulating partial results without needing to write everything to memory after each step.

This matters because the most common operation in AI is called matrix multiplication, which is essentially a massive flood of multiply-and-add steps. Digital chips do that in logic gates. IBM's design proposes doing it in the physics of the circuit itself, which could be considerably more energy-efficient.

How pulse coincidences replace digital multiplication

The patent describes a chip made of a grid of resistive devices (components whose electrical resistance encodes a value) with capacitors at each intersection that accumulate charge over time.

Two banks of signal generators fire stochastic pulse signals (random-timed electrical pulses whose average rate encodes a number) along rows and columns of the grid. When a row pulse and a column pulse arrive at the same intersection at the same time, that coincidence is detected and the resulting voltage or resistance is measured. The magnitude of that result encodes the product of the two numbers those pulses represent.

A controller module orchestrates the entire process:

  • Triggers both sets of signal generators to fire across rows and columns
  • Watches for coincidence events at intersections
  • Reads the voltage or resistance produced at each coincidence
  • Accumulates those readings into an output matrix

The stochastic (randomized) timing is intentional. By letting pulses fire randomly rather than on a fixed clock, the system can represent a wide range of values and naturally average out noise over many pulses, a technique borrowed from stochastic computing (a method where probability encodes numbers instead of binary digits).

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What this means for the cost and power of AI computing

AI workloads are dominated by matrix multiplications, the arithmetic engine behind every neural network layer. Digital chips handle this well but at high power cost, because each multiplication requires many logic gate operations. An analog approach, where the physics of resistors and capacitors perform the arithmetic directly, can in principle slash both the energy used and the silicon area required.

IBM has been one of the most active researchers in analog AI acceleration, including its work on phase-change memory and resistive RAM for in-memory computing. This patent extends that line of thinking with a specific stochastic-pulse scheme for full matrix-matrix (not just matrix-vector) multiplication, which is a harder problem to solve in analog hardware and one that matters for training AI models, not just running them.

Editorial take

This is a serious research patent, not a product filing. IBM Research has long published peer-reviewed work on analog AI accelerators, and this filing looks like a formalization of that work. The stochastic pulse coincidence scheme is a real technical idea with genuine efficiency potential, but analog computing for AI remains pre-commercial, with noise and precision challenges that digital chips don't have. Worth tracking, not worth hype.

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The drawings

8 drawing sheets from US 2026/0229302 A1 · click any drawing to enlarge

Patent filing page

Source. Full patent text and figures from the official USPTO publication PDF.

Editorial commentary on a publicly published patent application. Not legal advice.