Qualcomm · Filed Nov 14, 2025 · Published Oct 8, 2026

Qualcomm Files Patent for AR Headset Chips That Put Spare Memory Toward Sharper Video

An AR headset chip has a small pool of very fast memory, and this Qualcomm patent application has it lend unused room to whichever task can turn it into a sharper picture.

Smart glasses work with a phone to send sharper imagery and better 3D scene detail when spare chip storage allows. Drawing from patent filing US 2026/0310607 A1.
Smart glasses work with a phone to send sharper imagery and better 3D scene detail when spare chip storage allows.
See all 7 drawings from this filing ↓
Publication number US 2026/0310607 A1 US20260310607A1
Applicant QUALCOMM Incorporated
Filing date Nov 14, 2025
Publication date Oct 8, 2026
Inventors Simon Peter William Booth, Kapil Ahuja, Wesley James Holland, Manmohan Manoharan, Pawan Kumar Baheti, Animesh Behera
US classification 711/118
Status when we published Waiting for an examiner (Jul 24, 2026)
Parent application is a National Stage Entry of PCTUS2023075189 (filed 2023-09-27)
Document 20 claims

What Qualcomm's headset memory patent does

Ever packed a suitcase for the worst-case trip, then watched half of it stay empty? Chips do something similar. An augmented-reality (AR) headset has a small pool of very fast memory, called a cache, that its processors share while they handle video, camera feeds and tracking your head and hands. Engineers pick its size once, when they design the chip, based on a basic level of quality.

Qualcomm's patent application describes a chip that keeps an eye on how much of that fast memory is actually free. When there's a comfortable amount of spare room, it gives a slice to one task, such as decoding video, so that task can run at higher quality. When room gets tight, it takes the slice back and the quality steps down.

The idea is a headset that uses what its chip has on hand instead of leaving it idle.

From the filing · THE ABSTRACT
The PUs utilize the LLC to store interim data to perform their operations in support of a feature running on a HMD.

Translation: The processors use cache memory to hold temporary data while running head mounted display tasks.

How the headset tracks and reassigns spare memory

The core of the filing is a bookkeeping circuit that tracks the last level cache (LLC), the biggest and final stop of fast memory before the chip has to reach for slower main memory. For each feature running on the headset, it records how much of the LLC the feature was allotted and how much it is actually using. Every memory request carries a feature ID and the ID of the processing unit that sent it, so the circuit can keep count.

Periodically, the circuit adds up what is in use and subtracts that from the total. If the free amount passes a preset desired level, it hands a portion to a feature, and the processing units tied to that feature are told to raise quality. If free space drops below the level, the allocation and the quality are dialed back.

For video decoding (turning a compressed stream back into pictures), the filing gives three quality dials, each stored in the cache:

  • More reference frames, earlier frames used as the basis for the next one. The headset tells a companion device that sends the video how many to use when encoding.
  • Higher video frame resolution.
  • Finer depth maps (records of how far away things are). In the example, a 16×16 block goes from four 8×8 maps to sixteen 4×4 maps.

The same logic covers the headset's camera pipelines, one for tracking and one for the video you see. Keeping more working buffers in the cache lowers delay in those pipelines. When space runs short, the buffers spill into slower system memory.

Why spare memory matters on your face

The benefit for you would be a headset picture that gets sharper when the chip has room to spare, without needing a bigger, hotter, more power-hungry chip. Headsets sit on your face, so battery and heat limits are tight, and the filing notes that tracking has to be fast enough to avoid making wearers feel sick.

For chip designers, the approach means sizing the cache for a basic quality level and letting leftovers raise quality, instead of sizing for the best case and paying for it in chip area and power. The filing doesn't name a specific headset or Qualcomm chip, and the claims cover the allocation method in general terms.

Qualcomm's 54th filing we've tracked since July in the AR glasses race builds on one that prefetches 3D objects and one that shrinks avatar data.

Editorial take

The problem here is real but small. A headset chip has only so much fast memory, and every extra bit costs space and battery on a device you wear on your face. Picking one fixed size that suits every task means some of it sits idle whenever the headset isn't busy.

The fix matches that scale: watch the free space, give some to video or camera processing when there's plenty, and take it back when there isn't. Handing out spare resources to whoever can use them is an old idea in computing, so the claims read broadly, and the novelty comes down to the specific quality dials, like how many reference frames or how fine a depth map to keep.

Expect a modest gain: sharper pictures when conditions allow. For a headset maker counting every milliwatt, that is a reasonable thing to chase, and a routine piece of engineering.

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The drawings

7 drawing sheets from US 2026/0310607 A1 · click any drawing to enlarge

Computer chip parts, drawing sheet 1 from US 2026/0310607 A1
Sheet 1 Computer chip parts
Chip storage tracking table, drawing sheet 2 from US 2026/0310607 A1
Sheet 2 Chip storage tracking table
Smart glasses and phone connection, drawing sheet 3 from US 2026/0310607 A1
Sheet 3 Smart glasses and phone connection
Image storage layout, drawing sheet 4 from US 2026/0310607 A1
Sheet 4 Image storage layout
Video feed processing steps, drawing sheet 5 from US 2026/0310607 A1
Sheet 5 Video feed processing steps
Storage reassignment steps, drawing sheet 6 from US 2026/0310607 A1
Sheet 6 Storage reassignment steps
Device processor layout, drawing sheet 7 from US 2026/0310607 A1
Sheet 7 Device processor layout
Browse all the drawings 7 drawing sheets
Patent filing page

Source. Full patent text and figures from the official USPTO publication PDF.
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