IBM Files Patent to Fix Flaws in AI Chips Without Retraining the AI
Chips that do AI math inside their own memory could save a lot of energy, but their memory cells are never quite exact. IBM's filing describes correcting for that by rewriting the AI's stored numbers after training.
What IBM's analog AI chip fix actually does
Every time an AI model answers a question, a conventional computer shuttles huge piles of numbers between its memory and its processor, and all that commuting burns energy. Analog in-memory compute chips skip the commute by doing the math right inside the memory cells that hold the numbers.
The catch is that those cells are not precise. Set one to a value and it lands slightly off. Read it back and the result jitters. Leave it alone for a while and the value drifts. Those small errors add up and can make the AI less accurate.
IBM's filing describes a fix that happens after the AI is already trained. You measure how your particular chip misbehaves, then nudge the stored numbers to steer around the trouble spots. Each time one number changes, the others in its column get adjusted so the overall answer stays right. The usual alternative is retraining the whole model with the chip's flaws built in, which the filing calls tedious, time consuming and expensive.
adjusting a selected weight in a column of a weight matrix to a new value using a specified update strategy based on the hardware properties; and modifying other weights in a same column to compensate for changes in vector-matrix multiplication resulting from adjustment of the selected weight …
Translation: Fixing one part of the chip requires tweaking surrounding values to keep the math accurate.
How IBM nudges weights and rebalances columns
The method starts by characterizing the chip. A testing platform measures how the memory cells misbehave: programming errors (the cell lands off target), read noise (the reading jitters), conductance drift (the stored value shifts over time) and limited precision. The results go into a hardware database.
Then comes an adjustment loop, applied to a model that is already trained:
- Each weight (a number the AI learned) is stored as the difference between two conductances, which measure how easily a cell passes electric current.
- One weight in a column is moved using an error curve fitted to the chip's own data. The steps are small and kept within a range so the weights are not distorted too much.
- The other weights in that column are changed to compensate, so the column's vector-matrix multiplication (the multiply-and-add math at the heart of a neural network) still comes out right.
- The loop repeats until the adapted weights give output as close as possible to the original model's.
Finally, the adapted weights are translated into conductance values and programmed into the chip. The filing also describes using a compression technique called GPTQ to spread updates across the network, and setting weights near zero to exactly zero, where the chip showed high drift and error.
… characterizing hardware properties of an analog in-memory compute device; and iteratively modifying weights of a pre-trained neural network model stored on the based on the analog in-memory compute device in accordance with the characterized hardware properties.
Translation: The system studies the physical chip first, then adjusts the AI's internal settings to match.
Why this matters for low-power AI hardware
If you care about AI that runs on less power, this targets a real roadblock. Analog chips could cut the energy lost to moving data, and the filing says the savings could reach orders of magnitude, but the sloppy hardware has to be tamed first. A repair step applied after training means a finished model could be tuned to the specific chip it lands on.
For IBM, the appeal is skipping the slow, costly retraining that normally comes with these chips. The filing says its approach can bypass that training or at least give it a head start. It is a patent application, so nothing here says when or whether you will see it in a product.
This is the 12th IBM patent we've tracked since July in the AI chip wars, following ones on reshuffling compute mid-run and compressing AI text memory.
The problem here is big. Analog chips promise to run AI on far less power, but a chip that gives wobbly answers is useless no matter how efficient it is. Every memory cell drifts and jitters a little, and each chip has to be measured on its own.
Retraining a model for every flaw pattern costs time and computing power, so a cheaper repair step goes after the right obstacle. Measuring a chip, nudging its stored numbers and rebalancing each column fits a flaw that is small and built into the hardware.
The text gives no accuracy results, so you cannot tell yet how much of the loss it recovers. The stated aim is to match the original model's accuracy, and that bar decides whether analog AI chips are usable at all.
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8 drawing sheets from US 2026/0340074 A1 · click any drawing to enlarge
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