Intel Patents a Method to Stop Hackers From Reading Data Through Electricity

By Patentlyze Team · Updated Jul 3, 2026

Hackers don't always need your password. Sometimes they just watch how much power your chip uses while it encrypts data, and that leakage alone can reveal the secret. Intel's latest patent is a circuit-level answer to that threat.

How Intel wants to hide encryption from power snoopers

Imagine a safecracker who doesn't need to know the combination. Instead, they press their ear to the safe and listen to the tiny sounds the lock makes as it spins. Some hackers do something similar with computer chips: they measure tiny fluctuations in the power a chip draws while it's doing encryption, and from that pattern, they can sometimes reconstruct the secret key. This is called a power side-channel attack.

Intel's patent describes a voltage regulator, the circuit that supplies steady power to a chip, that deliberately introduces randomized noise into the power signal feeding an encryption circuit. The goal is to make the power draw look unpredictable, so a snooper watching from the outside can't learn anything useful.

This isn't software-level encryption hardening. It's done right at the hardware level, in the circuit that controls how electricity flows to the crypto component. That means it can protect any encryption chip that uses it, regardless of what software is running on top.

Inside Intel's randomized voltage regulation loop

The patent describes what Intel calls a push-pull regulation loop (PPRL), a type of voltage regulation circuit that uses two complementary transistors (a PMOS and an NMOS, which push and pull current in opposite directions) to keep power delivery stable.

The twist here is that the PPRL is fed a randomized voltage reference signal instead of a fixed, clean reference. A voltage reference is basically the target value the regulator is trying to hold. By randomizing it, the output voltage to the encryption circuit fluctuates in an unpredictable way, even while the circuit is doing its job.

The control circuit inside the PPRL also adjusts what the patent calls a reset voltage stored in a set of capacitors (tiny charge-holding components). This means the randomization isn't just added on top. It's baked into how the regulator resets and stabilizes itself cycle by cycle.

The cryptography circuit sits directly in the power path, with one side connected to the PMOS transistor's output and the other side tied to a capacitor. This close integration is what lets the randomization affect the encryption engine's power supply precisely, without disrupting the rest of the chip.

What this means for hardware security in chips

Power side-channel attacks are a real and documented threat, especially for hardware security modules, smart cards, and embedded security chips found in payment terminals, passports, and IoT devices. Defending against them usually requires careful software countermeasures or expensive post-silicon testing. A hardware circuit that bakes randomization directly into the power delivery is a cleaner, more automatic approach.

For Intel, this patent sits at the intersection of its chip manufacturing and its growing security portfolio. If this technique makes it into future processors or security co-processors, it could raise the bar for anyone trying to extract secrets from a chip just by watching its power consumption. That matters most in high-security contexts, but as encryption becomes standard in more consumer devices, the audience for this kind of protection keeps growing.

Editorial commentary on a publicly published patent application. Not legal advice.