AMD · Filed Mar 6, 2025 · Published Sep 10, 2026 · verified — real USPTO data

AMD Patents Automatic Process for Cutting Unused Parts From AI Software

Large AI models are full of redundant connections that waste memory and slow things down. Xilinx has filed a patent for a system that automatically identifies and removes the least important ones, using two signals at once instead of the usual one.

A matrix of machine learning model weights undergoes normalization and pruning to remove unused parts. Drawing from patent filing US 2026/0268142 A1.
A matrix of machine learning model weights undergoes normalization and pruning to remove unused parts.
See all 11 drawings from this filing ↓
Publication number US 2026/0268142 A1
Applicant Xilinx, Inc.
Filing date Mar 6, 2025
Publication date Sep 10, 2026
Inventors Lian Liu, XianDong Zhao, Dong Li, Emad Barsoum, Lu Tian
CPC classification 706/15
Grant likelihood Medium
Examiner CENTRAL, DOCKET (Art Unit OPAP)
Status Docketed New Case - Ready for Examination (Apr 9, 2025)
Document 20 claims

What Xilinx's automatic AI model trimming actually does

Today, large AI models carry millions of numerical connections called weights. Many of those connections contribute almost nothing to the model's output, but trimming them by hand is slow and error-prone.

Xilinx's patent describes a system that trims those connections automatically. It looks at two things: how large each connection's stored value is, and how strongly that connection actually gets used when real data flows through. Connections that score low on both counts get removed from the model.

The result is a smaller, faster model that should behave almost identically to the original. For anyone running AI on a chip with limited memory or power, that difference can mean faster responses and lower energy use, without needing an engineer to hand-tune anything.

From the filing · CLAIM 1
generate a first norm vector comprising a corresponding norm for each row of a first matrix of a plurality of matrices of machine learning model weights …

Translation: The system calculates the baseline size for every row in the AI's vast grids of weights.

How the pruning mask balances weights and activation signals

The patent centers on a technique called structured pruning, which removes entire groups of weights from a neural network's internal matrices rather than scattering deletions randomly.

Here is the process the system follows:

  • It calculates a norm vector for each row of a weight matrix. A norm is essentially a single number that summarizes how large the values in that row are overall.
  • It separately measures activation magnitudes, which capture how much those weights actually influence the model's output when real input data runs through. Think of activations as the live traffic on a road, versus the road's design capacity.
  • It combines both scores into a pruning metric for every individual weight.
  • Weights whose combined score falls below a threshold are removed, producing a pruned matrix that the compute circuits then use to run the model.

The key distinction from older approaches is the dual signal. Trimming by stored magnitude alone can accidentally remove weights that carry a lot of real-world traffic. Trimming by activation alone misses weights that are large but rarely activated. Combining both gives a more accurate picture of what is actually dispensable.

From the filing · THE ABSTRACT
The processing circuit performs magnitude normalization across one or more channel dimensions of the matrix of weights.

Translation: The chip adjusts the scale of the neural network's internal values to compare them fairly.

What leaner AI models mean for chips running real workloads

For people running AI tools on edge devices, servers with tight memory budgets, or hardware accelerators like Xilinx's own FPGAs, model size is a direct constraint on what the device can do. A model that has been pruned well runs faster, draws less power, and fits in less memory, all without retraining from scratch.

Xilinx's ongoing investment in on-chip AI efficiency points toward a world where this kind of automatic compression happens at deployment time rather than requiring months of manual optimization. If this technique works as described, developers shipping AI models to specialized hardware could skip a painful manual step and still get a model that performs nearly as well as the original.

This is the 33rd AMD filing we've tracked in AI chip wars since May, building on earlier applications like keeping calculations accurate and splitting work across chips.

Editorial take

Most people using an AI feature on a phone or laptop will never see a settings menu for "pruning." What they will notice is whether a response comes back fast or whether the device gets warm in their hand.

This patent is aimed at preventing those small, annoying failures by deciding which parts of an AI model can be safely removed using two checks together: how mathematically significant a connection is, and how much real data actually flows through it during use. Cutting based on size alone, without checking real usage, has a habit of removing connections that mattered, which shows up later as slower or less accurate results.

Smarter removal of unused complexity means devices that run cooler, respond faster, and waste less battery on work that does not need doing.

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The drawings

11 drawing sheets from US 2026/0268142 A1 · click any drawing to enlarge

Patent filing page

Source. Full patent text and figures from the official USPTO publication PDF.