AMD Patents a System That Splits AI Work Across Different Chips on the Fly
Most computers have a CPU, a GPU, and other chips sitting side by side, but AI workloads usually get routed to just one of them. AMD is patenting a way to break a single AI task into pieces and run each piece on whichever chip is best suited for it, right now, in the moment.
How AMD's chip-splitting scheduler handles AI tasks
Imagine your laptop is trying to answer a question using an AI model. The GPU is already busy, but the CPU has spare capacity. Rather than making the AI wait for the GPU to free up, what if the computer could automatically split the job and send part of it to the CPU and part to the GPU, then stitch the answers back together?
That's what AMD is describing here. The system watches what computing resources are actually available at the moment a task arrives, then decides on the fly which calculations go to which chip. It's less about raw speed and more about not wasting what's already in front of you.
For you, the practical upside is that AI features running on your device could feel more responsive because the computer stops waiting around for one overloaded chip when another is sitting idle.
… scheduling a first set of calculations to be made at a first type of processor of the heterogeneous computing system based on compute resources for the execution of the inference task on the first type of processor that are determined at runtime …
Translation: The system assigns tasks to specific chips based on what resources are available right then.
How the scheduler reads chip availability at runtime
The patent describes a dynamic scheduler sitting inside a heterogeneous computing system (a machine that has more than one type of processor, such as a CPU alongside a GPU or an AI accelerator). The scheduler's job is to intercept an inference task (the moment an AI model is asked to produce an answer or result) and decide, in real time, how to split the work.
The core mechanism works in two steps:
- At runtime (while the computer is actually running, not beforehand), the scheduler checks how much compute capacity each processor type has available right now.
- It then partitions the AI model's calculations: a first set goes to one processor type, a second set goes to another. When both sets are done, their outputs are combined into a single final result.
The patent emphasizes that the scheduling decision is made at runtime, not baked in during software design. That distinction matters because chip availability shifts constantly as other programs compete for resources.
The claim covers any heterogeneous computing system, meaning the approach could apply to desktops, laptops, or data-center servers that mix different processor architectures.
At runtime, there may be various circumstances the computing system is faced with that makes the usage of one type of processor more optimum than another processor for a certain number or type of calculations.
Translation: Changing conditions decide which processor works best for any given task.
What this means for AI workloads on AMD hardware
AMD makes both CPUs and GPUs, and its newer chips tightly integrate multiple processor types on the same package. A runtime scheduler that intelligently routes AI inference work across those processors could reduce the bottlenecks that happen when a GPU is saturated but a CPU or AI accelerator is underused. For anyone running AI tools locally on an AMD-powered PC, the payoff would be AI responses that arrive faster without needing faster hardware.
The filing sits in a crowded area: every major chipmaker is working on ways to coordinate workloads across heterogeneous compute. Keeping tabs on where companies are placing their bets in chips and AI scheduling is exactly what the latest Big Tech patents covered on Patentlyze trace, and AMD's approach here of deferring the routing decision to runtime rather than compile time is the detail worth watching.
AMD's 31st filing we've tracked since May in our AI chip wars coverage, building on faster on-chip data formatting and a two-table math shortcut, shows the company continuing to push on how chips handle AI work.
The practical payoff for an end user is modest but real: AI features that run locally, such as on-device assistants or image tools, could respond more consistently during the moments when your GPU is already tied up doing something else. AMD is essentially patenting the idea of a traffic cop that reassigns work dynamically rather than assuming one chip is always available. That's a meaningful improvement in device-level AI reliability, even if it won't double any benchmark numbers.
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The drawings
4 drawing sheets from US 2026/0244503 A1 · click any drawing to enlarge
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