Sony Patents a Video Compression Trick That Cuts Memory Overhead
Every time your TV streams a video, a chip is doing enormous math to compress and decompress each frame. Sony has filed a patent for a way to do that math with less memory, which could matter a lot for small, power-constrained devices.
What Sony's leaner video compression actually does
Ever wondered why cheap streaming sticks sometimes stutter while expensive TVs don't? Part of the answer is memory: the chip inside needs room to store the math tables it uses to compress and decompress video. The bigger or more complex the video format, the bigger those tables get.
Sony's patent describes a way to derive the math tables on the fly instead of storing every version up front. Rather than keeping a separate lookup table for each possible compression style, the chip rearranges the incoming image data in a specific order first, then runs a single shared table through it. You get the same result with a smaller memory footprint.
The target audience here is image encoding and decoding hardware, the kind found in cameras, set-top boxes, and streaming chips. Smaller memory requirements can translate into lower chip costs or lower power use, which trickles down to consumer devices.
circuitry configured to perform a permutation operation on a prediction residual of an image based on a transform type of an orthogonal transform for the prediction residual …
Translation: Specialized hardware rearranges image data before applying mathematical compression steps.
How the permutation step replaces extra stored matrices
Video compression works by finding patterns in an image and storing a compact mathematical description of those patterns instead of every raw pixel. A key step in that process is called an orthogonal transform (think of it as a way of expressing image data as a mix of frequencies, similar to how a music equalizer breaks a song into bass, mid, and treble).
To do that transform, the encoder uses a transformation matrix, basically a grid of numbers that defines the math. Different compression approaches (called transform types) need different matrices, and storing all of them simultaneously takes memory.
Sony's approach inserts a permutation step before the transform runs. A permutation is simply a reordering: the chip shuffles the incoming prediction residual data (the difference between what the encoder predicted a frame would look like and what it actually looks like) into a specific arrangement. After that shuffle, a single base transform matrix can handle what would otherwise require multiple distinct matrices.
The result:
- Fewer matrices need to be held in memory at once
- The same mathematical outcome is achieved for each transform type
- Encoded data is packed into a bitstream in the usual way, so the output stays compatible with existing standards
… suppression of an increase in a memory capacity required for orthogonal transform and inverse orthogonal transform …
Translation: The method prevents image compression systems from needing extra working memory.
What this means for video encoders and streaming hardware
Memory is one of the quietest cost drivers in consumer electronics. A chip that needs less RAM to run a video codec can be made smaller, cheaper, or more power-efficient, and those savings do eventually show up in the devices you buy, from cameras to streaming sticks to smart TVs.
The more interesting angle is on the encoding side. Cameras and editing hardware that process high-resolution or high-frame-rate video in real time are constantly under memory pressure. A method that keeps the transform step lean without sacrificing output quality is the kind of incremental improvement that adds up across a product line. Whether this specific approach makes it into a shipping product depends on how well it fits existing codec standards, but the problem it addresses is real.
Sony's ninth entry we've tracked since July in the AI chip wars watchlist follows one on waking chips via data lines and one on cutting memory when idle, showing how the company keeps rethinking chip power use.
Sony's approach here trades a simple "look up the table" operation for a more complicated "figure out the right order first, then look up the table" operation. That added figuring-out step costs real time and energy, which matters on any device where processing power is tight.
The trade makes sense when storage space is the harder constraint than processing speed, such as in a compact camera where memory is expensive but the main chip is fast. On lower-powered hardware, though, the extra calculation could eat into whatever savings the smaller memory delivers, and the whole bargain starts to look less attractive.
This is a focused, credible solution to a specific pressure inside video compression design, not a sweeping advance. Sony has a plausible answer for a real problem, but the answer only reads as clearly worthwhile in a fairly narrow set of device conditions.
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The drawings
102 drawing sheets from US 2026/0303867 A1 · click any drawing to enlarge
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