Apple · Filed May 28, 2026 · Published Sep 24, 2026 · verified — real USPTO data

Apple Patents a Slice-by-Slice Image Processing Method That Cuts Chip Memory Use

Apple is patenting a way to process images in narrow horizontal strips rather than loading an entire frame into chip memory at once, a small architectural shift that could reduce how long your device waits between capturing an image and showing the result.

A person holds a tablet displaying a virtual object on a real-world table, demonstrating augmented reality. Drawing from patent filing US 2026/0289719 A1.
A person holds a tablet displaying a virtual object on a real-world table, demonstrating augmented reality.
See all 10 drawings from this filing ↓
Publication number US 2026/0289719 A1
Applicant Apple Inc.
Filing date May 28, 2026
Publication date Sep 24, 2026
Inventors Bertrand Nepveu, Marc-Andre Chenier, Yan Cote, Yves Millette
CPC classification 345/522
Grant likelihood Medium
Examiner CENTRAL, DOCKET (Art Unit OPAP)
Status Docketed New Case - Ready for Examination (Jun 19, 2026)
Parent application is a Continuation of 18922265 (filed 2024-10-21)
Document 20 claims

What Apple's image-slicing chip trick actually does

Imagine your phone snapping a photo and then making you wait while its chip churns through the entire image before showing you anything. Now imagine the chip instead slicing that photo into narrow horizontal bands and processing each one as it arrives, handing you finished pieces of the result before the whole image is even captured. That's roughly what this Apple patent describes.

The idea is that by working through an image in strips, the chip never needs to hold the full picture in memory at once. It reads a strip, processes it, writes the result out, then reads the next strip into the same small memory space. The buffer, the temporary holding area inside the chip, stays small and gets reused.

This matters most in devices where both memory and speed are tight, like AR glasses or the compact chips inside iPhones. Smaller buffers mean lower power use and less heat, while the strip-by-strip approach means processed image data starts flowing out sooner.

From the filing · CLAIM 1
… read a first slice of the first image data into one or more input buffers; perform one or more image processing operations on the first slice of the first image data to obtain a first portion of second image data; …

Translation: The chip processes images piece by piece instead of loading the whole picture at once.

How the SoC processes image strips instead of full frames

The patent describes a system on a chip (SoC), the single integrated circuit that handles most computing tasks on a modern phone or wearable, that processes image data in slices rather than as a complete frame.

Here's how it works at the chip level:

  • The image processing circuitry reads a first slice of raw image data into a set of input buffers (small, fast memory areas on the chip).
  • It runs one or more image processing operations on that slice and writes the result to output.
  • It then reads the second slice into the same buffers, overwriting the first, and repeats the process.
  • This continues until the full image has been processed, strip by strip.

Because the buffers are reused for each slice, the chip never needs enough memory to hold the entire image at one time. The patent frames this as a way to reduce both buffer storage requirements and pipeline latency, meaning the delay between input and output shrinks because results start emerging before the last slice is even read in.

The claim is intentionally broad: the "one or more image processing operations" could include color correction, noise reduction, scaling, or other common camera pipeline steps. The architecture is meant to slot into existing image signal processor designs rather than replace them.

From the filing · THE ABSTRACT
Processing the first image data on a slice-by-slice basis enables the SoC to generate the second image data while reducing buffer storage requirements.

Translation: Breaking the image into chunks saves valuable temporary memory space on the chip.

What this means for AR headsets and camera speed

For AR headsets and cameras, the gap between capturing a scene and displaying a processed result is one of the hardest engineering problems around. Even tiny delays, measured in milliseconds, can cause visual discomfort or make augmented-reality overlays feel misaligned with the real world. A chip that starts outputting processed image data before it has even finished reading the input is meaningfully faster in practice.

Apple keeps filing around on-chip image and sensor processing for its Vision Pro and iPhone lines, and this patent fits that pattern. Reducing on-chip buffer size also cuts power draw, which is a real concern in a device like smart glasses that has a tiny battery. This is not a flashy invention, but it addresses a concrete, measurable cost in every camera-equipped device Apple ships.

Apple's seventh filing we've tracked in our AI chip wars watchlist since August builds on ideas like one keeping idle chips updated and a light-based memory design.

Editorial take

The problem this patent attacks, on-chip memory bottlenecks in image pipelines, is real and genuinely expensive. Memory on a chip is fast but scarce, and every extra kilobyte of buffer space competes with other circuitry for physical area and power budget. If you can cut buffer requirements without slowing the pipeline down, you free up room for other improvements.

The slice-based approach is not new as a general concept in signal processing, and Apple's claim here is fairly functional rather than a deep technical invention. The patent essentially describes the behavior, read a slice, process it, reuse the buffer, without specifying a particularly novel mechanism for achieving it. That makes the prior-art landscape tricky and the eventual granted scope likely narrower than the claim as written.

Still, the filing signals that Apple is actively optimizing its image signal processor architecture at the chip level, not just at the software layer. For a company building its own silicon for everything from iPhones to AR headsets, that kind of incremental, hardware-level tightening is exactly where compounding gains come from.

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The drawings

10 drawing sheets from US 2026/0289719 A1 · click any drawing to enlarge

Patent filing page

Source. Full patent text and figures from the official USPTO publication PDF.
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