Sony Patents a Shared Logical Address System to Speed Up Console Boot Loading

By Patentlyze Team · Updated May 22, 2026

Sony is patenting a way to make your console's secondary processor pre-load downloaded data in the background — using the exact same memory address layout that the main chip expects — so content can appear on screen before the console even finishes booting.

How Sony's dual-CPU memory trick cuts boot wait times

Imagine you put your PlayStation into sleep mode overnight and it downloads a big game update. When you turn it on the next morning, you'd normally have to wait for the main processor to fully boot up before it can even touch that downloaded data. Sony's patent describes a smarter handoff.

The idea is that a small, low-power secondary processor handles downloads while the console sleeps. The clever part: it stores that data using the same memory addressing scheme the main processor uses. So when the main chip wakes up, there's no awkward translation step — it can just read the data directly as if it had written it there.

The result is that your console can show downloaded content, like a game's boot screen or updated UI, before the full boot sequence even finishes. It's a background-prep trick that makes the whole wake-up experience feel faster and more seamless.

How the memory controller maps two CPU address spaces into one

The patent describes a memory controller that sits between two processors — a main CPU (the powerful chip that runs games and the OS) and a sub-CPU (a lightweight chip that stays active during standby to handle background tasks like downloads) — and a secondary storage device (think: the console's internal flash storage).

The core mechanism is logical address space mapping. Normally, different processors each have their own way of referring to memory locations — like two people using different zip code systems for the same city. The sub-CPU would write data to its own address space, and the main CPU would need a translation layer to find it. This patent eliminates that friction.

• The memory controller generates a logical address space for the sub-CPU during standby operation.
• It then maps that sub-CPU address space directly onto the main CPU's logical address space — so both chips refer to the same data using the same coordinates.
• When the main CPU boots, it can issue access requests to flash memory and retrieve the pre-loaded data immediately, without waiting for a remapping or copy step.

The practical payoff: data downloaded during standby — game assets, system updates, media content — can be displayed on a connected screen before the boot process completes, shaving perceptible seconds off the wake-from-sleep experience.

What this means for PlayStation download and startup experience

For PlayStation users, this is about closing the gap between 'I pressed the power button' and 'I'm playing'. Modern consoles already do background downloads, but surfacing that data quickly at boot requires the main CPU and secondary chip to agree on where things are stored. This patent solves exactly that coordination problem at the hardware level.

From a systems design standpoint, it's a tidy solution: rather than building a runtime translation layer (which adds latency and complexity), Sony's approach bakes the address-space unification into the memory controller itself. If this ships in a future PlayStation, you'd likely notice it most during cold boots after overnight downloads — content just appears faster, with less of that blank-screen waiting period.

Editorial commentary on a publicly published patent application. Not legal advice.