Microsoft Patents a Way to Lock Down Security Settings Shared Between Chips
Modern processors are no longer single chips but collections of smaller chips talking to each other inside the same package. Microsoft has filed a patent describing how to stop attackers from intercepting or tampering with security instructions sent across those internal chip-to-chip connections.
What Microsoft's inter-chiplet security scrambling actually does
A chip inside your device sends a secret instruction to another chip inside the same device. That sounds safe, but the wire between them is a real attack surface, and a determined adversary can listen in or swap the message for a malicious one.
Microsoft's patent describes a way to protect those internal messages. Before sending security settings from one chip to another, the sending chip scrambles the data using a random number (called a salt), then creates a kind of fingerprint of the scrambled data. The receiving chip checks the fingerprint first, and only unscrambles the settings if everything matches.
This matters because today's processors, including those in servers, laptops, and AI accelerators, are increasingly built from multiple smaller chips (called chiplets) that must trust each other. If one chip gets tricked into accepting fake security settings, the whole device can be compromised.
generating, by a pseudorandom number generator in the primary chiplet, a cryptographic salt; masking, by a masking function of the primary chiplet, the security configuration data for the secondary chiplet based on the cryptographic salt to generate masked configuration data; …
Translation: The main chip scrambles the security settings using a randomly generated piece of data before sharing them.
How the salt, mask, and signature work together
The patent describes a four-step protocol for passing security configuration data (settings that control what a chip is allowed to do and who it trusts) from a primary chiplet to one or more secondary chiplets inside the same physical package.
- Salt generation: A pseudorandom number generator inside the primary chiplet produces a cryptographic salt, a one-time random value used to make the scrambling unpredictable.
- Masking: The salt is combined with the security configuration data using a masking function, producing masked configuration data that is meaningless without the salt.
- Signature: A cryptographic signature (a tamper-evident fingerprint) of the masked data is generated, also based on the salt. This lets the receiver detect any modification.
- Transmission and verification: All three items (the salt, the masked data, and the signature) are sent over the inter-chiplet link. The secondary chiplet verifies the signature first, and only if the check passes does it unmask and apply the settings.
If the signature does not match, the secondary chiplet rejects the package entirely and does not change its security state, protecting against both passive eavesdropping and active tampering on the internal chip-to-chip bus.
The secondary chiplet may then verify the integrity of the masked configuration information using the salt and the signature, and the configuration information can be unmasked based on the salt.
Translation: The receiving chip checks the signature to make sure the data is safe before unscrambling it.
What this means for secure multi-chip hardware design
As chip designers pack more computing power into a single device by connecting multiple chiplets, the internal buses those chiplets use become an under-examined security boundary. Attackers who compromise hardware at a physical level or exploit firmware bugs can potentially intercept or forge messages on those internal links. This patent addresses that gap with a scheme that requires no pre-shared secret key between chiplets, relying instead on a fresh random salt for each transaction.
Microsoft's steady filing around hardware-level security suggests the company is thinking carefully about the server and AI-accelerator market, where multi-chiplet designs are now standard. For everyday users, the practical result would be devices that are harder to compromise even when an attacker has direct hardware access.
This is the 17th Microsoft filing we've tracked in our chip coverage since May, following one on three-direction air cooling and one on stopping cross-chip data fetches.
Getting this to a real product requires new chips, not a software update. The security method described here has to be physically built into the silicon itself, which means chipmakers need to design compatible hardware, manufacture it, and ship it before any device can use this protection.
The approach solves a real problem: modern processors are built from multiple smaller chips stacked together, and right now there is no standard way to securely pass configuration instructions between them. This patent describes a method that works without needing a pre-shared secret, which removes one of the harder setup problems.
The narrow scope and single inventor suggest this is a foundational piece, not a finished system. Microsoft would need additional work, and likely industry cooperation, before this becomes something a customer ever touches.
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The drawings
3 drawing sheets from US 2026/0268027 A1 · click any drawing to enlarge
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