Nvidia Files Patent to Cut Chip Sorting Checks From 12 Hours to 27 Minutes
Proving that two chip designs sort numbers identically can take over 12 hours on 64 computers. Nvidia's filing describes a shortcut that did it in about 27 minutes on two.
What Nvidia's sorting-circuit checker actually does
Every time a chip designer tweaks a circuit, someone has to prove the new version still gives exactly the same answers as the old one. For a circuit that sorts numbers, that proof can eat more than half a day.
Nvidia's filing tackles this for sorting circuits inside its GPUs. Engineers keep two versions: one written for the chip itself and one in C++ for fast simulations. They sort in totally different ways, so you can't compare them step by step. The old workaround was to test every combination of which inputs are switched on: 4,096 cases for a 12-item sorter, over 12 hours on 64 computers.
The patent's shortcut is to write down the rules a correct answer must follow (right order, no repeats, ties settled by position), then check both designs against those rules. In Nvidia's example, that took about 27 minutes on 2 computers.
… introducing constraint application nodes at outputs of the first sorting agent, wherein the constraint application nodes comprise placeholder variables that replace signal values of the outputs of the first sorting agent during hardware verification …
Translation: Fake placeholder signals are placed at the chip outputs to simplify the verification math.
How stand-in variables replace one sorter's outputs
The filing covers formal equivalence checking: software that mathematically proves two designs behave the same for every possible input. Nvidia's example pairs a hardware-code sorter meant for GPU silicon with a C++ reference model used in simulations. One compares many pairs at once; the other loops through the inputs, repeatedly picking the smallest.
Their inner steps don't line up, so the checker can't compare them midway. Instead the system writes down output specification constraints, rules any correct sorted output must meet:
- Range: every pick points at a real input.
- Uniqueness: no input is picked twice.
- Validity: outputs are filled whenever enough valid inputs exist.
- Ordering: sort keys run in ascending or descending order.
- Stability: equal keys are settled by input position.
It then works in two phases. First it proves the hardware sorter obeys the rules and that both designs get identical inputs. Second it puts placeholder variables (stand-in values that can be anything the rules allow) at that sorter's outputs, then proves the other design's outputs obey the same rules. The rules are encoded for SAT and SMT solvers (engines that hunt for logical counterexamples).
The filing also describes timing each design against the rules first, so the stand-ins go on whichever side is quicker to check.
… enabling equivalence verification without requiring internal equivalence points between implementations and improving convergence behavior of formal verification tools.
Translation: This allows engineers to check completely different sorting designs much faster.
Why faster chip checks matter for GPU design
You won't see this in a product, but you may feel it in how fast GPUs get designed. Chip makers rerun checks like this every time a design changes, and a check that runs overnight on 64 machines slows every round of edits. The filing calls the shorter version a coffee-break check. It also cuts tool licenses from 16 to 1 in the example, which is real money.
The filing says checking time grows roughly in a straight line as the sorter gets bigger: going from 12 to 13 inputs adds about 8 percent, where the old method doubles. The claims also reach past sorting to other circuit blocks whose outputs can be described by rules, though the worked examples stick to sorters.
Nvidia's 58th filing we've tracked in the AI chip wars since July continues its focus on chatbot speed, following one cutting reply wait times and one speeding up responses in hardware.
The closest thing to a shippable feature here is a recipe inside Nvidia's own chip-checking setup. It needs no new hardware, only the rules written down for a sorter and a commercial checking tool. The filing names three of those tools, Cadence Jasper, Synopsys DPV and Siemens SLEC, as places it can run.
The catch is the setup work. Someone has to write the five rules for each type of circuit, prove the first design obeys them, and decide which side gets the stand-ins. That is easy for sorters, whose rules fit on a page, and harder for blocks with messier outputs.
Our read: this is a workflow improvement Nvidia's engineers could adopt as soon as they trust it, and you will never see it on a box. The 27-minute figure comes from the company's own example, so treat it as one data point.
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