Google · Filed Jan 30, 2026 · Published Oct 15, 2026

Google Files Patent for Helper Hardware That Takes Memory Chores Off a Device's Main Chip

Every app you run leaves behind memory it no longer needs, and your device's main chip usually has to stop and sweep it up. Google's patent hands that sweeping to a crowd of tiny helpers that never sit around waiting.

A computer chip for gadgets like phones and smartwatches that speeds up performance by offloading heavy data handling. Drawing from patent filing US 2026/0319830 A1.
A computer chip for gadgets like phones and smartwatches that speeds up performance by offloading heavy data handling.
See all 3 drawings from this filing ↓
Publication number US 2026/0319830 A1 US20260319830A1
Applicant Google LLC
Filing date Jan 30, 2026
Publication date Oct 15, 2026
Inventors Keun Young Park, Stephen Michael Blackburn, Mark Woh, Chakravarthy Srinivas Kosaraju, Thierry Gloude Rajappa, Wei-Han Chen, Martin Christoph Maas
US classification 718/102
Status when we published Waiting for an examiner (Jul 30, 2026)
Parent application Claims priority from a provisional application 63752019 (filed 2025-01-31)
Document 20 claims

What Google's memory helper cores actually do

Every time an app finishes with a chunk of memory, something has to go back and tidy up. Programmers call this garbage collection. It mostly means following long chains of references from one piece of data to the next, and it often leaves your device's main processor waiting for each piece to arrive.

Google's patent describes a separate block of hardware that takes over the job. It has many small workers, and each one is handed a memory task. If the data is already sitting in a nearby, fast storage area (a cache), the worker grabs it there. If not, it asks a dedicated fetching unit to bring the data from the slower main memory, then pauses that task and starts another instead of standing idle.

The filing says the design could hold hundreds or even thousands of these workers, so a lot of memory work can be in flight at once.

How a paused task hands off to the memory engine

The patent describes a memory acceleration system: a block of hardware that sits beside the main processor (the "host") and takes on memory-heavy jobs the host hands over. Its main parts are a group of small processing elements (PEs, tiny programmable workers), a shared data cache (a small, fast pool of memory), and a memory offloading engine that moves data to and from the larger, slower external memory (DRAM).

Each PE receives a task tied to some target data. A helper called a remapper answers one quick question: is that data already in the cache? If yes, the PE works from the cache. If no, the PE schedules a memory-to-memory operation (a copy or update between memories) for the offloading engine to carry out.

The filing also describes how the workers stay busy:

  • Each PE can run several threads (separate strands of work) or lighter co-routines.
  • When one thread must wait for data, the PE pauses it and starts another.
  • A job dispatcher keeps a task queue and assigns tasks to PEs.
  • When the engine reports the transfer is done, the PE resumes the paused thread.

If two PEs need the same data, the engine performs the operations as atomic (indivisible) steps, one after the other, so neither overwrites the other. The filing's main example is garbage collection.

Why Google cares about memory cleanup speed

If hardware like this reaches real devices, the payoff would be less waiting inside memory-hungry apps and less work for the main chip. The filing says memory cleanup is dominated by pointer chasing, which general-purpose chips and basic copy engines handle poorly. It also says the accelerator can borrow the host's memory mapping instead of rebuilding it, a step that can cost several hundred milliseconds.

The description lists smartphones, tablets, laptops, smartwatches, and servers as possible homes, and it points to AI and machine learning workloads as the reason memory speed keeps mattering more. It is a patent filing, not a product, and it names no specific Google device.

Google's 20th filing we've tracked since July in our AI chip competition, following one on faster text shortcuts and one on fixed-size AI memory, adds another piece to how the company is approaching AI hardware design.

Editorial take

Claim 1 is short and wide. It asks for a memory offloading engine and several workers that each take a memory task, then either use the cache or schedule a transfer from outside memory.

Nothing in that claim mentions garbage collection, pausing threads, or any particular chip. Those details show up in the later claims, so the broad version could reach many designs that split work between a fast nearby cache and slower main memory.

Checking a cache before going to main memory is a familiar move in computing, so the specific part is the group of workers handing slow fetches to a separate engine. For most readers this is plumbing that would show up as smoother apps, if it shows up at all. Its interest lies in how wide the first claim is drawn.

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The drawings

3 drawing sheets from US 2026/0319830 A1 · click any drawing to enlarge

Computer chip powering everyday gadgets, drawing sheet 1 from US 2026/0319830 A1
Sheet 1 Computer chip powering everyday gadgets
Inner layout of data assistant, drawing sheet 2 from US 2026/0319830 A1
Sheet 2 Inner layout of data assistant
Steps for sharing data work, drawing sheet 3 from US 2026/0319830 A1
Sheet 3 Steps for sharing data work
Browse all the drawings 3 drawing sheets
Patent filing page

Source. Full patent text and figures from the official USPTO publication PDF.
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