Nvidia · Filed May 2, 2025 · Published Nov 5, 2026

Nvidia Files Patent for Running Big AI Models on Graphics Cards With Little Memory

Your graphics card could start loading the next piece of an AI model while it is still working on the current one. Nvidia's filing uses that overlap so a model bigger than the card's memory can still answer without long waits.

An in-game AI helper answers a player query on screen without overwhelming computer memory. Drawing from patent filing US 2026/0350343 A1.
An in-game AI helper answers a player query on screen without overwhelming computer memory.
See all 31 drawings from this filing ↓
Publication number US 2026/0350343 A1 US20260350343A1
Applicant NVIDIA Corporation
Filing date May 2, 2025
Publication date Nov 5, 2026
Inventors Aditya Ukarande, Ram Rangan, Marc Blackstein
US classification 706/15
Status when we published Waiting for an examiner (Jun 10, 2025)
Document 20 claims

What Nvidia's patent does for oversized AI models

Every time an AI helper on your PC answers a question, its whole brain has to sit in your graphics card's memory. If that brain is too big, the card runs one part, stops, fetches the next part, and waits again. Those pauses add up fast.

Nvidia's filing chops the AI model into chunks and sets aside two memory slots. While the card works through one chunk, the next chunk is already being copied into the other slot. When the first chunk finishes, the second is ready to go, and the slot that just freed up starts loading chunk number three.

The filing's own example is a game assistant that answers questions like "How do I tame it?" while sharing the card with the game. It stays inside a fixed memory budget so the game's frame rate doesn't suffer.

From the filing · CLAIM 1
cause a second portion of a neural network to be loaded into memory concurrently with inferencing performed using a first portion of the neural network …

Translation: It swaps in the next piece of the AI model while the current piece is still working.

How Nvidia's two memory buffers swap AI chunks

The claims cover one core idea: load a second portion (a shard) of a neural network into memory at the same time the processor is running inference (getting an answer out of the trained model) on the first portion. Then use the first portion's output to run the second. The filing calls this pipelined sharding.

A software library splits the model along its layers. It reserves a fixed slice of the graphics card's memory (VRAM) for the key-value cache, a running scratchpad the model uses to remember earlier words in the conversation. The rest is divided into two equal buffers, and each shard is sized to fit in half of what's left. When a shard finishes, its output (the activations, meaning intermediate results) is copied into the other buffer. The third shard then loads into the space the first one vacated.

How much work the graphics card (GPU) does depends on the link between it and the main processor (CPU):

  • Fast link (the filing cites NVLink-C2C at 900 GB/s): every shard runs on the GPU, for both reading the prompt and writing the answer.
  • Slower link (PCIe): pipelining handles the prompt-reading phase. For the answer-writing phase, the scratchpad is copied to the CPU, and roughly 35 to 40 percent of the shards run there while the GPU pipelines the rest.

The library checks the link type by asking the graphics driver. In one example, a model gets a 1 GB budget split into shards of 500 MB. The filing also says the model needn't be pruned, distilled or quantized (shrunk) to fit.

From the filing · THE ABSTRACT
… cause the loaded second portion to be used to perform inference using output of the first portion of the neural network …

Translation: The newly loaded section then takes the results from the previous step and keeps going.

Why this matters for game assistants on your PC

The practical payoff is for AI features that have to share a graphics card with something else, such as a game. The filing's example keeps the assistant inside a fixed memory budget so the game still gets the rest. It also says the full-size model can run as-is, without the accuracy loss that usually comes with shrinking it.

There are limits, and the filing admits them. If copying takes longer than the work it hides, even the partial version may gain nothing, and the system falls back to a fixed split between CPU and GPU. How much you would gain depends on how quickly your machine moves data between its parts. The filing measures success by how fast the first word appears and how many words arrive per second.

Nvidia's 63rd filing we've tracked since July in our AI chip wars watch adds to earlier work on splitting a chatbot's workload and spreading its long memory, exploring more ways chips coordinate.

Editorial take

The person who benefits most is anyone who wants an AI helper running on their own PC while a game is on screen. The failure it targets is easy to picture: the assistant hogs graphics memory, the game stutters, or the answer takes forever to start. The filing tracks exactly those two numbers, how fast the first word appears and how many words follow each second.

You would likely never see the technique itself. You would see a helper that responds in a reasonable time without having been shrunk to fit, which the filing says it avoids needing.

The filing is candid about a limit. On a slower connection between processor and graphics card, copying can eat the gain, and the processor has to take roughly a third of the work. Whether you would notice an improvement depends on how fast your PC moves data around.

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The drawings

31 drawing sheets from US 2026/0350343 A1 · click any drawing to enlarge

Swapping AI chunks into chip memory in turns, drawing sheet 1 from US 2026/0350343 A1
Sheet 1 Swapping AI chunks into chip memory in turns
Storing active AI pieces side by side inside graphics memory, drawing sheet 2 from US 2026/0350343 A1
Sheet 2 Storing active AI pieces side by side inside graphics memory
A game assistant answering player questions in real time, drawing sheet 3 from US 2026/0350343 A1
Sheet 3 A game assistant answering player questions in real time
Timing data transfers so the graphics chip never sits idle, drawing sheet 4 from US 2026/0350343 A1
Sheet 4 Timing data transfers so the graphics chip never sits idle
Moving data back to system memory over slower connections, drawing sheet 5 from US 2026/0350343 A1
Sheet 5 Moving data back to system memory over slower connections
Keeping data on the graphics card when connections are fast, drawing sheet 6 from US 2026/0350343 A1
Sheet 6 Keeping data on the graphics card when connections are fast
Choosing how to divide the AI based on connection speed, drawing sheet 7 from US 2026/0350343 A1
Sheet 7 Choosing how to divide the AI based on connection speed
Loading new AI pieces while running current tasks, drawing sheet 8 from US 2026/0350343 A1
Sheet 8 Loading new AI pieces while running current tasks
Show the other 23 sheets
Software tools that let apps run chopped up AI models, drawing sheet 9 from US 2026/0350343 A1
Sheet 9 Software tools that let apps run chopped up AI models
Hardware and code that divide AI tasks across processors, drawing sheet 10 from US 2026/0350343 A1
Sheet 10 Hardware and code that divide AI tasks across processors
Data center servers sharing AI workloads across many racks, drawing sheet 11 from US 2026/0350343 A1
Sheet 11 Data center servers sharing AI workloads across many racks
An all-in-one computer chip with built-in graphics and memory, drawing sheet 12 from US 2026/0350343 A1
Sheet 12 An all-in-one computer chip with built-in graphics and memory
Graphics chip components designed for heavy parallel computing, drawing sheet 13 from US 2026/0350343 A1
Sheet 13 Graphics chip components designed for heavy parallel computing
Chip units that handle graphics and AI tasks, drawing sheet 14 from US 2026/0350343 A1
Sheet 14 Chip units that handle graphics and AI tasks
Hybrid processor featuring dedicated cores for AI tasks, drawing sheet 15 from US 2026/0350343 A1
Sheet 15 Hybrid processor featuring dedicated cores for AI tasks
Multi-core computer processor and its internal instruction layout, drawing sheet 16 from US 2026/0350343 A1
Sheet 16 Multi-core computer processor and its internal instruction layout
An AI accelerator chip with high-speed memory and networking, drawing sheet 17 from US 2026/0350343 A1
Sheet 17 An AI accelerator chip with high-speed memory and networking
Brain-inspired chip cores that mimic biological neurons to run AI, drawing sheet 18 from US 2026/0350343 A1
Sheet 18 Brain-inspired chip cores that mimic biological neurons to run AI
Networked server racks linked together inside an AI supercomputer, drawing sheet 19 from US 2026/0350343 A1
Sheet 19 Networked server racks linked together inside an AI supercomputer
Graphics accelerator layout with shared memory and calculation blocks, drawing sheet 20 from US 2026/0350343 A1
Sheet 20 Graphics accelerator layout with shared memory and calculation blocks
Central computing chip with built-in AI engines and graphics cores, drawing sheet 21 from US 2026/0350343 A1
Sheet 21 Central computing chip with built-in AI engines and graphics cores
Processor core parts that run general computer math and logic, drawing sheet 22 from US 2026/0350343 A1
Sheet 22 Processor core parts that run general computer math and logic
A chip built to speed up complex AI math, drawing sheet 23 from US 2026/0350343 A1
Sheet 23 A chip built to speed up complex AI math
Processor parts designed to crunch heavy math for AI, drawing sheet 24 from US 2026/0350343 A1
Sheet 24 Processor parts designed to crunch heavy math for AI
A language processing chip sharing instructions across cores, drawing sheet 25 from US 2026/0350343 A1
Sheet 25 A language processing chip sharing instructions across cores
How software connects an AI app to a chip, drawing sheet 26 from US 2026/0350343 A1
Sheet 26 How software connects an AI app to a chip
Translating program code into instructions split between main chips, drawing sheet 27 from US 2026/0350343 A1
Sheet 27 Translating program code into instructions split between main chips
Translating graphics code to run on different chips, drawing sheet 28 from US 2026/0350343 A1
Sheet 28 Translating graphics code to run on different chips
Sensors, cameras, and chips powering an autonomous car, drawing sheet 29 from US 2026/0350343 A1
Sheet 29 Sensors, cameras, and chips powering an autonomous car
Internal circuits that calculate and store numbers during AI training, drawing sheet 30 from US 2026/0350343 A1
Sheet 30 Internal circuits that calculate and store numbers during AI training
Training an AI model to prepare it for tasks, drawing sheet 31 from US 2026/0350343 A1
Sheet 31 Training an AI model to prepare it for tasks
Browse all the drawings 31 drawing sheets
Patent filing page

Source. Full patent text and figures from the official USPTO publication PDF.
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