Qualcomm
Qualcomm · Chip · Filed May 8, 2025 · USPTO published Nov 12, 2026 · This week's release
Qualcomm Files Patent to Reshuffle Data While a Graphics Chip Loads It
A graphics chip often has to fetch numbers and then shuffle them into the right order before it can use them. A new Qualcomm patent application has the chip do that reordering as the numbers arrive, using one extra setting on the load command.
- Publication number
- US 2026/0359927 A1(US20260359927A1)
- Applicant
- QUALCOMM Incorporated
- Filed · Published
- May 8, 2025 · Nov 12, 2026
- Inventors
- Elina KAMENETSKAYA, Fei WEI, Amir MOMENI
- Status when we published
- Waiting for an examiner
- Document
- 20 claims
- US classification
- 345/522
- Examiner
- CREARY, LATRELL ANTHONY (Art Unit 2613)
What Qualcomm's transposed GPU load actually does
You're applying a filter to a photo, and the graphics chip behind your screen has to chew through a huge number of tiny calculations at once. It does that with a crowd of small workers, each handling its own slice of the job. Before any work starts, every worker needs its numbers fetched from memory and set on its own desk.
The catch is how those numbers get handed out. Normally each worker receives four neighbors from the same row of memory. Some jobs, like multiplying grids of numbers, want something different: each worker should get one number from four different rows. Today the chip has to either fetch numbers one at a time, which takes four times as many instructions, or fetch them the usual way and then pass them between workers, which wastes time and space.
Qualcomm's patent adds a flip option to the fetch command. With it switched on, the numbers land with the right workers on arrival, with no cleanup step afterward.
receive a load instruction for loading multiple data vectors from the memory into multiple GPRs for each of multiple fibers of the GPU, wherein the load instruction indicates a transposed load; …
Translation: The graphics chip gets a special command to rearrange data while pulling it from memory into working registers.
How the graphics chip spreads one row across workers
In a GPU, work is split among many fibers (tiny threads of execution that run the same program on different data). Each fiber has its own general purpose registers, or GPRs, which are small, very fast storage slots right next to the math units. A load instruction copies data from main memory into those slots.
In the usual vec4 load (a "vector of four" load), each fiber starts at its own memory address and copies four neighboring values into its own four registers. The patent adds a transposed load, where the same four-by-four block of memory is written in a flipped pattern. In the filing's example, fiber 0's four registers receive the first value from each of the four fibers' starting addresses, fiber 1's registers receive the second value from each, and so on.
The flip happens in the texture engine or load store engine (the GPU's built-in data movers) as the data arrives from memory. The load instruction carries a setting that says which mode to use, and the compiler (the tool that turns a developer's program into chip instructions) can pick the transposed mode when it spots that it will be more efficient. The claims also cover a matching transposed store, for writing flipped data back out to memory.
… each element of the data vector can be loaded to a GPR of multiple GPRs that is associated with a different one of the multiple fibers.
Translation: Individual data pieces are shuffled across different processing threads on the fly during the loading process.
Why matrix and image math is the target here
If you play games, edit photos or run AI features on a device with a chip built this way, the payoff would be less wasted effort inside the chip's data handling. The filing points to matrix multiplication and convolution (a grid-style calculation common in image processing) as places where the flipped layout helps. It gives no speed numbers, so any gain is unmeasured here.
The filing names the two workarounds it would replace. Fetching one value at a time needs four times as many instructions and uses only a quarter of the data pipeline's capacity. Shuffling after the fact costs time and temporary extra register space. Doing the flip on arrival avoids both costs. The filing lists phones, game consoles and VR headsets among the devices this graphics tech could run on, though it names no product.
Qualcomm's 17th filing we've tracked in the GPU rendering race since July adds to a run that includes faster reflections and skipping duplicate points.
Source: US 2026/0359927 A1 at the USPTO (PDF). Full patent text and figures are in the official publication.
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The drawings · 8 sheets
8 drawing sheets from US 2026/0359927 A1 · click any drawing to enlarge
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