Microsoft · Chip · Filed May 29, 2026 · USPTO published Sep 24, 2026 · Sep 24 release

Microsoft's New Patent Covers Technology That Reads Text Characters in Parallel

Every time a computer reads structured text, it moves through it one character at a time, each step waiting on the last. Microsoft's new patent describes hardware that breaks that chain, reading multiple characters at once.

By Patentlyze Team · Updated Sep 24, 2026 · 4 min read

A CSV file parser and Unicode parser feed a bit/byte stream into a state machine to produce tabular data. Drawing from patent filing US 2026/0289110 A1. — A CSV file parser and Unicode parser feed a bit/byte stream into a state machine to produce tabular data.All 10 drawings ↓

Publication number: US 2026/0289110 A1(US20260289110A1)
Applicant: Microsoft Technology Licensing, LLC
Filed · Published: May 29, 2026 · Sep 24, 2026
Inventors: Daniel LO, Blake D. PELTON
Status when we published: Waiting for an examiner
Document: 20 claims
US classification: 704/9
Parent application: Continuation of 18/629,057 (filed Apr 8, 2024)(18629057)

What Microsoft's parallel text parser actually does

Ever tried to find one email in a ten-year archive? The reason that search takes even a few seconds is partly that computers have to read text the slow way: one character, then the next, then the next, each step blocking the one after it. That bottleneck adds up fast when you're processing millions of documents, log files, or database queries.

Microsoft's patent describes a circuit that processes several characters at the same time instead of one at a time. The trick is to pre-compute every possible outcome for each character in parallel, then pick the right answer at the end, rather than waiting to know the right answer before starting each step. It's a bit like filling out all possible tax forms simultaneously and then tossing the wrong ones, instead of deciding which form to fill out first.

The result is a text parser (the piece of software or hardware that reads and interprets structured text) that can run significantly faster on the same hardware, which matters most in data centers and high-speed processing systems.

From the filing · CLAIM 1

… generating, without a value of a current state of the text parser as input and by a first set of state table circuits that each correspond to a predetermined state of a set of predetermined states, first state table circuit outputs based on the first character and the corresponding predetermined state of the set of predetermined states …

Translation: The circuit processes characters without needing to know the current state beforehand.

How the circuit skips the state-bottleneck step

A text parser is a program that reads a stream of characters and figures out what they mean, whether that's a URL, a database query, a config file, or code. Most parsers use a state machine, a system that tracks where it is in the text by maintaining a "current state" and updating it character by character. The problem: each update depends on the previous one, creating a chain where step two cannot start until step one finishes.

Microsoft's patent breaks that chain by using a set of dedicated state table circuits, one for each possible state the parser could be in. Instead of waiting to know the current state before looking up what to do next, the circuit runs all the lookups at once, one per possible state. An output multiplexer (essentially a selector switch) then picks the correct result based on whatever the actual current state turns out to be. The lookup and the selection happen in separate pipeline stages, so they can overlap in time.

For parallel character processing, the circuit chains multiple input units together. The first unit processes character one and passes all its possible outcomes downstream. The second unit uses those propagated possibilities to process character two without waiting for a definitive answer from character one. The final selection is made at the end across the whole chain.

The patent also describes a way to reduce the number of possible states that need to be tracked at any moment, by identifying and pruning out paths that can't be valid given the characters seen so far. Fewer live states means a smaller, faster selector circuit.

From the filing · THE ABSTRACT

… all possible current states for a given text input are read from a state table circuit, and the correct next state and output are then selected therefrom by an output multiplexer based on the current state …

Translation: The system looks up every possible outcome at once and picks the right one later.

What faster parsing means for real-world software

For most users, this is invisible infrastructure. But text parsing sits at the heart of database engines, network packet inspection, compilers, log analysis, and security scanning. When those systems run in data centers processing enormous volumes of data, shaving processing time per character adds up to real cost and speed differences at scale.

Microsoft's run of hardware-acceleration filings reflects a broader interest in moving compute-heavy tasks from software running on general processors into specialized circuits. For cloud services, where Microsoft operates Azure, faster parsing can mean lower infrastructure costs and quicker query responses, the kind of improvement that shows up in your application's speed without any code change on your end.

Microsoft's 19th chip patent we've tracked since May joins earlier applications like one splitting AI across chips and one locking shared security settings in our chip patent coverage.

Editorial take

The speed gain here comes from a straightforward swap: instead of looking up one answer at a time, the chip looks up every possible answer simultaneously and then picks the right one. The cost is physical space on the chip, multiplied by however many states the parser tracks. For a simple, stable parser that cost is manageable; for a complex or frequently updated one, it could consume meaningful resources fast.

The pruning mechanism, which trims irrelevant states mid-process, exists specifically to hold that cost down. But pruning adds its own fragility: if the logic misbehaves or the parser grows over time, the space savings shrink and the behavior gets harder to reason about.

For high-volume systems running fixed, well-defined rules, like parsing network packets or structured data feeds, the trade reads as sound. For anything more fluid, the area cost deserves a hard look before committing to silicon.

Source: US 2026/0289110 A1 at the USPTO (PDF). Full patent text and figures are in the official publication.

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