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Sony · Chip · Filed Dec 12, 2024 · USPTO published Sep 24, 2026 · Sep 24 release

Sony Patents a Way to Wake Up Chips Using the Data Line They're Already On

Sony has filed a patent for a method that lets a controller chip tell connected chips to come out of their startup freeze, without needing a separate physical wire dedicated to that job.

A system for waking up chips, with a master device controlling power and sending data to a slave device. Drawing from patent filing US 2026/0288216 A1.
A system for waking up chips, with a master device controlling power and sending data to a slave device.All 14 drawings ↓
Publication number
US 2026/0288216 A1(US20260288216A1)
Applicant
Sony Semiconductor Solutions Corporation
Filed · Published
Dec 12, 2024 · Sep 24, 2026
Inventors
Kohei Kawanishi, Tadaaki Yuba
Status when we published
Approved; patent expected soon
Document
15 claims
US classification
713/1
Examiner
DEROSE, VOLVICK (Art Unit 2176)
Parent application
National Stage Entry of PCT/JP2023/025994 (filed Jul 14, 2023)(PCTJP2023025994)

How Sony's reset signal travels on an existing wire

A security camera stares at an empty hallway all night. Inside it, a handful of chips are waiting to receive instructions before they do anything. Right now, one common way to give those chips the "go ahead" signal is to run a dedicated wire from the main controller to each chip. Sony's patent describes cutting out that extra wire entirely.

Instead of a separate line, the controller sends a specific coded sequence (a "reset pattern") down the same data wire the chips already share. A chip that receives this sequence recognizes it as the signal to stop waiting and start working. The chip has a small piece of logic whose only job is to watch for that specific pattern and trigger the startup process when it arrives.

For consumer electronics with many chips crammed into a tight space, fewer wires means simpler circuit boards, lower costs, and potentially fewer things that can go wrong during manufacturing.

From the filing · CLAIM 1
a pattern interpretation unit that determines whether or not a target reset pattern has been received, the target reset pattern being transmitted from the controller device through a data communication line and instructing first reset release after the target device is powered on …

Translation: A special detector watches the data line to spot a specific wakeup signal sent after power on.

How the target device reads and acts on the reset pattern

The patent describes a communication system made up of two types of participants: a controller device (the chip in charge) and one or more target devices (chips that follow orders). All of them share a common data communication line, similar to a party line where everyone can hear what is sent.

After a target device powers on, it sits in a reset state (a frozen condition where it waits before doing anything). Normally, releasing that freeze requires either a dedicated reset wire or a more complex initialization sequence. This patent skips that by encoding a special bit pattern directly into the data stream.

Each target device includes two key components:

  • A pattern interpretation unit that continuously monitors the data line and checks whether the incoming signal matches the pre-agreed "target reset pattern."
  • A reset control unit that, once a match is confirmed, releases the reset state so the chip can begin normal operation.

The system is described as compatible with the I3C specification (a modern short-range chip-to-chip communication standard used widely in smartphones, cameras, and sensors). Because the reset pattern travels on the existing data line, no extra physical connection is required.

From the filing · THE ABSTRACT
… a reset control unit that performs control to release a reset state of the target device in a case where the target reset pattern is determined to have been received.

Translation: Once the chip recognizes that specific signal, it wakes up and starts operating normally.

What this means for device startup in compact electronics

For engineers designing compact devices like phones, wearables, or camera modules, every trace on a circuit board costs space and money. Eliminating a dedicated reset line is a small but real saving, especially when dozens of chips are involved. It also removes one category of hardware fault: a reset wire that corrodes, breaks, or is simply mis-routed during assembly.

For end users, the payoff is indirect. You would notice it as a device that starts up more reliably, or as a product that is thinner or cheaper because the internal board is simpler. Sony has been filing around chip-to-chip communication since at least 2024, reflecting the company's deep investment in the sensor and semiconductor hardware that sits inside cameras and mobile devices.

Sony's eighth filing since July in our AI chip wars watchlist, following one that cuts chip memory instantly and one linking display chips, adds another piece to how the company is rethinking chip design.

Source: US 2026/0288216 A1 at the USPTO (PDF). Full patent text and figures are in the official publication.

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The drawings · 14 sheets

14 drawing sheets from US 2026/0288216 A1 · click any drawing to enlarge

Master and slave chip system., drawing sheet 1 from US 2026/0288216 A1
Sheet 1 Master and slave chip system.
Chip system with analog and digital blocks., drawing sheet 2 from US 2026/0288216 A1
Sheet 2 Chip system with analog and digital blocks.
Chip system with I2C communication., drawing sheet 3 from US 2026/0288216 A1
Sheet 3 Chip system with I2C communication.
Flowchart for chip power-on and reset., drawing sheet 4 from US 2026/0288216 A1
Sheet 4 Flowchart for chip power-on and reset.
Chip system with reset release command., drawing sheet 5 from US 2026/0288216 A1
Sheet 5 Chip system with reset release command.
Data packet formats for chip reset., drawing sheet 6 from US 2026/0288216 A1
Sheet 6 Data packet formats for chip reset.
Flowchart for reset release command., drawing sheet 7 from US 2026/0288216 A1
Sheet 7 Flowchart for reset release command.
Chip system with reset mode setting., drawing sheet 8 from US 2026/0288216 A1
Sheet 8 Chip system with reset mode setting.
Show the other 6 sheets
Sony Patents a Way to Wake Up Chips Using the Data Line They’re Already On patent drawing, sheet 9
Sheet 9
Sony Patents a Way to Wake Up Chips Using the Data Line They’re Already On patent drawing, sheet 10
Sheet 10
Sony Patents a Way to Wake Up Chips Using the Data Line They’re Already On patent drawing, sheet 11
Sheet 11
Sony Patents a Way to Wake Up Chips Using the Data Line They’re Already On patent drawing, sheet 12
Sheet 12
Sony Patents a Way to Wake Up Chips Using the Data Line They’re Already On patent drawing, sheet 13
Sheet 13
Sony Patents a Way to Wake Up Chips Using the Data Line They’re Already On patent drawing, sheet 14
Sheet 14
Patent filing page

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