Qualcomm · Chip · Filed May 8, 2025 · USPTO published Nov 12, 2026 · This week's release

A New Qualcomm Patent Has Graphics Chips Load Their Next Batch of Data While Still Working

A graphics chip that fetches its data one piece at a time spends a lot of its day waiting. Qualcomm's patent application has it load the next batch while it is still crunching the current one.

By Patentlyze Team · Updated Nov 12, 2026 · 3 min read

A screen chip keeps video moving smoothly by prefilling a spare storage slot with the next image chunk while working on the current one. Drawing from patent filing US 2026/0359926 A1. — A screen chip keeps video moving smoothly by prefilling a spare storage slot with the next image chunk while working on the current one.All 15 drawings ↓

Publication number: US 2026/0359926 A1(US20260359926A1)
Applicant: QUALCOMM Incorporated
Filed · Published: May 8, 2025 · Nov 12, 2026
Inventors: Elina KAMENETSKAYA, Amir MOMENI, Fei WEI, Leiming YU
Status when we published: Examiner raised objections; the company can respond
Document: 20 claims
US classification: 345/501
Examiner: LIU, GORDON G (Art Unit 2618)

What Qualcomm's double-buffer graphics trick does

A line cook chops onions while a helper slides the next board of vegetables into reach. The cook never stops to fetch anything, so dinner comes out faster. Qualcomm's patent application applies the same idea inside the chip that draws your phone's graphics.

Graphics chips do enormous amounts of multiplication on grids of numbers. The slow part is often fetching those numbers from the chip's main fast storage, which other jobs need too. Qualcomm's filing sets up two small holding areas next to the math circuits. While one is being worked on, the other is being filled with the next chunk of numbers.

The chip also sends a signal when each load finishes, so the math circuits know the next batch is ready. For you, the aim is a chip that wastes less time waiting and leaves room for other work to run at the same time.

From the filing · CLAIM 1

… load, into a second buffer and in parallel with the processing of the first wave of the input data, a second wave of the input data …

Translation: The chip loads the next data set while it is still working on the current one.

How the two buffers trade places each round

The claims describe a graphics processor that feeds a block of data (a tile, or grid, of numbers) to its math circuits in waves, meaning chunks of input handled together. The claimed steps run in this order:

Load the first wave into a first buffer (a small holding area).
Process that wave with a set of processing elements (the circuits that do the multiplying and adding).
While that is happening, load the second wave into a second buffer.
Send out a signal saying the second load is finished.

Later claims keep the pattern going: the second wave gets processed while a third wave loads back into the first buffer, so the two buffers trade places. The description calls this double buffering.

The description explains why. Matrix multiplication (multiplying two grids of numbers, common in graphics work) can be done as an inner product, which re-reads the inputs many times, or an outer product, which reads once but needs result storage that grows fast with tile size. Here, one big read pulls the tile from the general purpose registers (the shader processor's main fast storage) into the buffer. The processing elements, laid out as a 4 by 4 grid in the example, are then fed from the buffer in a fixed pattern. For a 64 by 64 tile, main-storage reads drop from 2,048 to 128, while the nearby buffer handles 2,048.

The filing also describes checking the block's size or shape against a threshold, which the dependent claims treat as an add-on.

What this means for Qualcomm's graphics chips

If this works as described, your device's graphics chip spends less time waiting on its own memory, and its main storage stays free for other jobs. The description says heavy grid math and ordinary graphics work could then run side by side instead of crowding each other out. It lists phones, tablets, game consoles, PCs, and headsets as possible homes.

Keep expectations modest. The filing gives read counts but no measured speed or power results. It is also an early application: the examiner's first review rejected the claims as filed, which is routine and usually followed by amendments.

Qualcomm's 18th filing we've tracked since July in the GPU rendering race adds to a run that includes one on reshuffling data mid-load and one on faster reflections.

Editorial take

Because the change lives inside the chip, you can't get it through a software update. A small holding area has to be wired in next to the math circuits, so it would show up only in a future chip design, and only if Qualcomm's engineers decide the savings are worth the space it takes.

On paper the route to a product is short. The idea needs no new kind of hardware, just one extra buffer and some control logic. The document gives read counts (for a 64 by 64 block, 128 reads from main storage instead of 2,048) but no measured speed or power results, so the payoff is unproven.

Expect a small gain, the sort you would notice as smoother graphics or a little less battery drain, if you notice it at all. The broad claim is plain double buffering, and the more specific details sit in the dependent claims, such as the fixed feeding pattern for the 4 by 4 grid.

Source: US 2026/0359926 A1 at the USPTO (PDF). Full patent text and figures are in the official publication.

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The drawings · 15 sheets

15 drawing sheets from US 2026/0359926 A1 · click any drawing to enlarge

Main parts inside a device that create and show images, drawing sheet 1 from US 2026/0359926 A1 — Sheet 1 Main parts inside a device that create and show images

Steps a graphics chip follows to turn code into pixels, drawing sheet 2 from US 2026/0359926 A1 — Sheet 2 Steps a graphics chip follows to turn code into pixels

How main processors share graphics tasks with memory, drawing sheet 3 from US 2026/0359926 A1 — Sheet 3 How main processors share graphics tasks with memory

Sorting shapes into batches before building 3D scenes, drawing sheet 4 from US 2026/0359926 A1 — Sheet 4 Sorting shapes into batches before building 3D scenes

Splitting drawing chores across multiple visual compute cores, drawing sheet 5 from US 2026/0359926 A1 — Sheet 5 Splitting drawing chores across multiple visual compute cores

Internal layout of a single graphics processing core, drawing sheet 6 from US 2026/0359926 A1 — Sheet 6 Internal layout of a single graphics processing core

Using dedicated local storage to feed core calculators, drawing sheet 7 from US 2026/0359926 A1 — Sheet 7 Using dedicated local storage to feed core calculators

Multiplying data grids to compute visual effects and AI, drawing sheet 8 from US 2026/0359926 A1 — Sheet 8 Multiplying data grids to compute visual effects and AI

Show the other 7 sheets

Two ways a graphics chip multiplies grids of numbers, drawing sheet 9 from US 2026/0359926 A1 — Sheet 9 Two ways a graphics chip multiplies grids of numbers

How older designs waste energy by repeatedly reading memory, drawing sheet 10 from US 2026/0359926 A1 — Sheet 10 How older designs waste energy by repeatedly reading memory

Adding local storage cuts down repeat memory requests, drawing sheet 11 from US 2026/0359926 A1 — Sheet 11 Adding local storage cuts down repeat memory requests

Internal parts that juggle multiple incoming waves of data, drawing sheet 12 from US 2026/0359926 A1 — Sheet 12 Internal parts that juggle multiple incoming waves of data

How the chip cues up new data without interrupting calculations, drawing sheet 13 from US 2026/0359926 A1 — Sheet 13 How the chip cues up new data without interrupting calculations

Basic steps for loading the next batch during ongoing math, drawing sheet 14 from US 2026/0359926 A1 — Sheet 14 Basic steps for loading the next batch during ongoing math

Checking data size first ensures overlapping loads run smoothly, drawing sheet 15 from US 2026/0359926 A1 — Sheet 15 Checking data size first ensures overlapping loads run smoothly

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The GPU rendering raceCross-company · 142 filings

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The drawings · 15 sheets

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