Qualcomm Patents a Fix That Keeps Memory Calculations Faster When Chips Think for Themselves
Qualcomm is patenting a system that lets a processor use two completely different rules for addressing memory depending on what kind of task is running. It's a small structural change with a real impact on a class of chips that can run calculations directly inside the memory itself.
What Qualcomm's dual address scheme actually does
When a processor needs data from memory, it doesn't just ask for it by a simple number. Modern chips deliberately scramble or rearrange those address numbers so that data gets spread evenly across many memory banks, keeping things fast. That scrambling works well for normal computing tasks, but it creates a problem for a newer idea called process-in-memory (PIM).
PIM is a design where the memory chip itself does some of the computing, rather than sending data back and forth to a separate processor. The trouble is, when the processor scrambles the address before sending the request, the memory chip can't always figure out where the data actually lives, so it can't do its own calculations correctly.
Qualcomm's patent describes a system where the processor uses the standard scrambled addresses for regular requests, but automatically switches to a different, unscrambled addressing style whenever it sends a request meant for PIM operations. Same memory chip, two sets of rules, used at the right moment.
send, to a memory device, a first request associated with a first physical address of the memory device, wherein the first physical address is in accordance with a first address selection scheme that includes an address hashing scheme; …
Translation: The system sends standard memory requests using a traditional hashing method to scramble and organize addresses.
How the processor switches address schemes on the fly
Modern memory systems use a technique called address hashing, which works like shuffling a deck of cards. Instead of storing data in a straight line, the processor deliberately remaps address numbers so data lands on many different memory banks at once, keeping the whole system busy and fast.
The problem appears when the memory device is also supposed to do its own computing. Process-in-memory (PIM) is an architecture where logic circuits sit inside the memory chip itself. When data is needed for a PIM operation, the memory's internal circuits need to know exactly where that data lives inside their own chip. A hashed (scrambled) address doesn't give them that straightforward location.
Qualcomm's patent covers an apparatus where the processing system maintains two distinct address selection schemes:
- A first scheme that applies normal address hashing for conventional read/write requests
- A second scheme, free of hashing or structured differently, used exclusively when the request targets PIM operations
The processor detects that a request is PIM-bound and applies the appropriate scheme before sending the physical address to the memory device. The memory chip receives an address it can actually act on locally, without having to reverse-engineer any scrambling.
In accordance with the second request being associated with process-in-memory (PIM) operations by the memory device, the second physical address is in accordance with a second address selection scheme different than the first address selection scheme.
Translation: When the chip performs its own internal data processing, it switches to a completely different addressing method to keep things fast.
What this means for chips that compute inside memory
As chipmakers look for ways to cut the energy cost of shuttling data between processors and memory, PIM has become an active area of hardware research. The bottleneck goes beyond raw speed; it includes the sheer power consumed every time data crosses that gap. Letting memory do some of the work internally is one of the more practical answers people are seriously testing right now.
The catch is that PIM only works if the rest of the system cooperates. Qualcomm's approach here tries to retrofit PIM compatibility into how processors already manage memory addresses, without forcing a complete redesign of the addressing infrastructure. This filing on PIM-aware address hashing sits alongside the broader stream of Big Tech patent news covering how major chipmakers are rethinking data placement at the silicon level, and it signals that Qualcomm is thinking carefully about making PIM practical in real products rather than just lab demonstrations.
Qualcomm's 38th filing we've tracked in our AI chip wars watchlist since July builds on its earlier work on merging AI models on a chip and compressing AI model data.
Keeping two separate systems running inside one machine means every request must get the right label. A wrong label causes a quiet failure that is very hard to track down, and fixing that problem takes constant effort, not just a one-time cost.
That cost is worth accepting. Rebuilding the whole routing system from scratch to suit the new memory setup would break every existing piece of hardware and software that connects to it. Taking on some fragility now, in order to keep that upgrade path open, is the more honest deal.
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The drawings
8 drawing sheets from US 2026/0244577 A1 · click any drawing to enlarge
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