Nvidia · Filed Apr 7, 2026 · Published Aug 20, 2026 · verified — real USPTO data

Nvidia Patents a Way to Feed Its Chips More Power When the Work Actually Matters

Your GPU wastes power running low-priority background tasks at full tilt. Nvidia wants chips that watch what kind of work is coming and dial power up or down accordingly, before the task even starts.

Two identical processor chips housed together, each operating at 2.8 gigahertz with 72 threads and 250 watts of power. Drawing from patent filing US 2026/0244254 A1.
Two identical processor chips housed together, each operating at 2.8 gigahertz with 72 threads and 250 watts of power.
See all 45 drawings from this filing ↓
Publication number US 2026/0244254 A1
Applicant NVIDIA Corporation
Filing date Apr 7, 2026
Publication date Aug 20, 2026
Inventors Sreedhar Narayanaswamy
CPC classification 713/330
Grant likelihood Medium
Examiner CENTRAL, DOCKET (Art Unit OPAP)
Status Docketed New Case - Ready for Examination (May 13, 2026)
Parent application is a Continuation of 18425618 (filed 2024-01-29)
Document 20 claims

What Nvidia's thread-priority power system actually does

Chips today treat almost every task the same for power: they ramp up, do the work, and ramp down, without much sense of whether the task actually needed that energy. Nvidia wants to change that by teaching chips to check the importance of incoming work before deciding how much electricity to use.

Here's the idea: every program you run creates small units of work called threads. Some threads are time-sensitive and important (say, rendering the next frame of a game, or running an AI inference request someone is waiting on). Others are background housekeeping that can wait. Nvidia's patent describes a system where the chip gets a heads-up about what mix of high-priority and low-priority threads is coming, then sets its power level to match.

The practical upside is that a chip handling mostly low-priority work doesn't need to burn full power. And when important work arrives, it gets the headroom it needs without delay. That balance matters most in data centers running mixed workloads, but the principle applies anywhere Nvidia chips operate.

From the filing · CLAIM 1
obtain information indicating an expected proportion of thread priorities of threads to be performed by a first one or more processors; determine an amount of power to allocate to the first one or more processors based, at least in part, on the information indicating the expected proportion of thread priorities; …

Translation: The chip checks how important the upcoming tasks are so it knows how much electricity to send.

How the chip reads task priority and adjusts its own power draw

The core mechanism is an API (a software interface that lets programs talk to hardware) through which software can tell the processor what proportion of upcoming threads are high-priority versus low-priority. The chip then uses that proportion to calculate how much power to allocate and adjusts the actual voltage and frequency delivered to match.

The patent's key phrase is "expected proportion of thread priorities." Rather than reacting after the fact, the chip gets a forward-looking signal. If 80% of the next batch of threads is low-priority background work, the chip doesn't need to sustain its maximum power state. If a burst of high-priority threads is incoming, it can pre-position itself to deliver more power without a lag.

  • Obtain: The processor reads information about the priority mix of threads about to be scheduled.
  • Determine: It calculates a target power level suited to that mix.
  • Adjust: It changes the actual power delivered to match that target before or as the work runs.

The patent frames this as an API-level capability, meaning software developers or runtime environments (like AI inference servers or game engines) could explicitly communicate priority information to the hardware, giving the chip better data than it could infer on its own.

From the filing · THE ABSTRACT
Apparatuses, systems, and techniques to allocate power to one or more processors. In at least one embodiment, processors or computing systems perform an API to allocate power to one or more processors based, at least in part, on indications of priority of one or more threads to be performed by the one or more processors.

Translation: Software tools help route extra electricity to the chips when high priority tasks arrive.

What this means for AI workloads and your GPU's efficiency

Power management in chips is a constant tug of war between performance and efficiency. Data centers running Nvidia GPUs for AI training or inference face real costs when chips idle at high power states during low-priority work, or when they're slow to ramp up for high-priority requests. A system that pre-reads the workload mix and adjusts power proactively could reduce energy waste on the low end and cut latency on the high end, both of which translate to money and user-facing responsiveness.

For everyday users, the most noticeable version of this kind of system would be a GPU that doesn't drain laptop battery during background tasks but still delivers full performance the moment you need it. The filing sits within a broader trend of chip-level intelligence around power, one well tracked through new Big Tech patents covering silicon efficiency across Nvidia, AMD, Intel, and Apple.

Nvidia's 28th filing we've tracked since July in our AI chip wars watchlist follows one cutting AI response time and one on two-stage video compression.

Editorial take

Proactive power allocation based on thread priority is a real problem worth solving, especially as Nvidia's GPUs handle increasingly mixed workloads in data centers where idle power isn't free. The reader-facing payoff is real but indirect: you probably won't feel it as a feature, you'll feel it as a GPU that runs cooler under light load and doesn't stutter when something important needs immediate headroom. The patent's mechanism is narrow and specific, which is actually a good sign for its usefulness.

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The drawings

45 drawing sheets from US 2026/0244254 A1 · click any drawing to enlarge

Patent filing page

Source. Full patent text and figures from the official USPTO publication PDF.