Intel
Intel · Chip · Filed Jun 23, 2026 · USPTO published Nov 12, 2026 · This week's release
Intel Files Patent for Reusing AI Software on Newer Chips Without Starting Over
Every new generation of AI chip tends to break the instructions written for the last one. Intel has filed a patent application for a translator that rewrites those instructions instead of making engineers start over.
- Publication number
- US 2026/0359026 A1(US20260359026A1)
- Applicant
- Intel Corporation
- Filed · Published
- Jun 23, 2026 · Nov 12, 2026
- Inventors
- Stavros Passas, Gary Baugh, Srikanth Vasuki
- Status when we published
- Waiting for an examiner
- Document
- 20 claims
- US classification
- 717/136
- Parent application
- Claims priority from a provisional application 63875648 (filed Sep 4, 2025)
What Intel's AI chip instruction translator does
Imagine you spent months writing a step-by-step manual for one coffee machine. Then the maker releases a new model with fewer buttons and a smaller water tank, and your manual stops working. Someone has to rewrite the whole thing.
That is close to the headache Intel describes for AI chips. The instructions that tell an AI chip what to do are built for one exact design, so they usually break when the design changes, even a little. Intel's patent application describes a translation step that takes instructions written for an older chip and rewrites them to fit a newer one.
The translation can swap in a more flexible part of the chip when a specialized part is missing. It can also fold several to-do lists into one when the new chip has fewer workers. Old work carries over instead of starting from zero.
… translating the first compute task descriptor to a second compute task descriptor based on a configuration of a second device, wherein the second compute task descriptor is a data structure for configuring the second device to execute the AI operator of the neural network model …
Translation: Converting instructions meant for one chip so they work on a different chip.
How Intel rewrites tasks for a different chip
Intel's filing describes a compiler (the software that turns an AI model into step-by-step instructions a chip can follow) that works in two phases. It starts with the model's graph, a map where each node is an operation, such as matrix multiplication (the core math behind most AI) or convolution (a way of scanning images for patterns), and each line shows data moving between operations.
In the first phase, the compiler writes task descriptors (small data records that tell each part of the chip what to do) for one specific chip design. In the second phase, it translates those descriptors for a different chip. That chip may have a different number of copy engines (parts that move data around), fixed-function engines (parts built for specific jobs), or programmable engines (flexible, general-purpose parts), or a different amount of on-chip memory.
The filing lists several ways the translation can go:
- Direct translation: the new chip has a matching part, so the task carries over.
- Emulation: the new chip lacks a specialized part, so a flexible engine runs a software version of the job.
- Serialize and merge: the new chip has fewer engines, so several task lists are combined into one, in the order the work must happen.
When the new chip has less on-chip memory, the filing describes using the flexible engines to stage data in main system memory instead. One first-phase result can also be translated for several later chips. Claim 1 covers the translate-and-hand-over step itself.
Remapping strategies of the compiler may include direct translation, emulation, serialization, or merge. The resulting task descriptors for the second hardware configuration can be used by an NPU of the second hardware configuration to execute the AI model.
Translation: The compiler uses several methods to adapt the software for different chip layouts.
Why old AI software matters for new chips
Chip designs change every generation, and the filing says instructions built for one version usually do not carry over to the next. Even chips within a single generation can differ in memory size or part counts. A translator means teams could keep using older compiled work instead of redoing it for every variant.
The filing says this lets developers aim at the latest chip design early, even before the newest compiler is ready, while keeping older AI models working on newer hardware. For you, that points toward AI features that keep running when your next laptop or server gets a new chip. The filing does not name any specific product, so that is a direction, not a promise.
Intel's 55th filing we've tracked in our AI chip wars watchlist since May builds on ideas like splitting graphics chips into slices and leaner visual AI blocks.
Source: US 2026/0359026 A1 at the USPTO (PDF). Full patent text and figures are in the official publication.
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The drawings · 14 sheets
14 drawing sheets from US 2026/0359026 A1 · click any drawing to enlarge
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