Qualcomm
Qualcomm · Chip · Filed May 12, 2025 · USPTO published Nov 12, 2026 · This week's release
Qualcomm Files Patent to Cut the Data Shuffling Inside Graphics Chips Running AI
Graphics chips running AI lose time rearranging the same numbers between steps. A new Qualcomm patent application lets the matrix hardware read data in the shape the next step wants.
- Publication number
- US 2026/0359928 A1(US20260359928A1)
- Applicant
- QUALCOMM Incorporated
- Filed · Published
- May 12, 2025 · Nov 12, 2026
- Inventors
- Elina Kamenetskaya, Fei Wei, Amir Momeni
- Status when we published
- Examiner raised objections; the company can respond
- Document
- 20 claims
- US classification
- 345/522
- Examiner
- TSWEI, YU-JANG (Art Unit 2614)
What Qualcomm's register layout patent does
Imagine you keep a recipe box sorted by dish type. Your friend needs the same cards sorted by ingredient, so every time you trade, someone has to stop and re-sort the whole box. Do that hundreds of times a minute and most of your effort goes into shuffling cards.
Something similar happens inside a graphics chip doing AI work. One part of the chip wants numbers arranged in small square blocks. Another part wants them in long straight lines, one row or column at a time. Switching between the two takes extra steps and extra time.
Qualcomm's filing teaches the block-crunching part of the chip to accept data in straight lines too. A piece of software called a compiler (the program that turns code into chip instructions) can then pick whichever arrangement avoids the reshuffling.
load data from memory into the GPRs as a matrix of data using a linear layout supported by a matrix multiplication unit, including loading a different line of the matrix into each GPR of the GPRs; …
Translation: The chip loads matrix data directly into registers in a straight line layout.
How the chip loads one matrix line per register
A graphics chip (GPU) keeps its working numbers in general purpose registers, which are small, very fast storage slots. Many tiny workers, called fibers, run the same instructions side by side, and the chip's matrix multiplication unit (the circuit that multiplies grids of numbers) works with the data in those slots.
The filing describes a matrix unit that favors a folded layout: each fiber holds one number from a small square tile of the matrix. That suits matrix math. Other parts of the chip, the vector units that handle one line of numbers at a time, prefer whole rows or columns. Converting between the two costs extra steps.
The claims cover loading a matrix using a linear layout that the matrix unit supports, with a different line of the matrix in each register, so each fiber works on a different line at a time. The line can be a row or a column. Results can be written back the same way, so the next matrix or vector step can use them as is.
The filing also describes a compiler choosing the layout. When matrix and vector operations are interleaved in the code, it picks the linear layout and skips the conversion. The matrix unit still supports the folded layout as well.
Why this matters for AI on Qualcomm graphics chips
If it worked as described, AI programs that mix two kinds of math could waste less time rearranging data inside the chip. The description lists phones, game consoles, augmented reality devices and in-car computers among the devices that could carry such a chip, so any of them could benefit in principle. The filing gives no speed numbers, so the size of the gain is unknown.
The application is still early. An examiner rejected the claims as filed, which is routine at this stage and often followed by amendments. Even if it moves forward, you would never see the change directly, only possibly smoother or more efficient AI features.
Qualcomm's 64th filing we've tracked since July in the AI chip wars space follows one on Wi-Fi router strain and one on porting models across chips.
Source: US 2026/0359928 A1 at the USPTO (PDF). Full patent text and figures are in the official publication.
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The drawings · 8 sheets
8 drawing sheets from US 2026/0359928 A1 · click any drawing to enlarge
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